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// For RP2040 processor and 8 or 16 bit parallel displays:
// The parallel interface write cycle period is derived from a division of the CPU clock
// speed so scales with the processor clock. This means that the divider ratio may need
// to be increased when overclocking. I may also need to be adjusted dependant on the
// display controller type (ILI94341, HX8357C etc). If RP2040_PIO_CLK_DIV is not defined
// the library will set default values which may not suit your display.
// The display controller data sheet will specify the minimum write cycle period. The
// controllers often work reliably for shorter periods, however if the period is too short
// the display may not initialise or graphics will become corrupted.
// PIO write cycle frequency = (CPU clock/(4 * RP2040_PIO_CLK_DIV))
//#define RP2040_PIO_CLK_DIV 1 // 32ns write cycle at 125MHz CPU clock
#define RP2040_PIO_CLK_DIV 2 // 64ns write cycle at 125MHz CPU clock
//#define RP2040_PIO_CLK_DIV 3 // 96ns write cycle at 125MHz CPU clock

Fix H and V gradient use in sprite
New ESP8266 board package uses RDUINO_ARCH_ESP8266
old package defined ESP8266

Fix typo and remove unnecessary error in TFT_config.h

1. RGB configuration was configured incorrectly, and caused re-definition warnings.
2. MISO pin is not always set, so shouldn't trigger a compilation error (see e.g. `Setup25_TTGO_T_DISPLAY.h`).

Create Setup301_BW16_ST7735.h for BW16-based Boards

Forgot to copy over updated file!

This configuration works on all BW16 boards

Problem has not been reproduced but names changes anyway.

TFT pixel reads for smooth graphics functions now supported.

ST7735: fix RGB/BGR selection