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Add example user setup 61

The RP2040 processors can now drive 8 bit parallel and SPI displays using the PIO hardware.

The PIO offloads the processor by providing:
1. PIO managed setWindow sequence
2. PIO managed block and screen fill

The RP2040 can now be used with 8 bit parallel TFT interface displays. DMA is also supported for both SPI and 8 bit parallel displays.

Reduce SPI read clock frequency to avoid bit errors on reading CGRAM.

Add option to use SPI3 in STM32F4 (and possibly also in F2)

On ESP8266 when using overlap, only one SPI device can share the FLASH SPI bus .

In setup add:
#define FONT_4_GBP
To replace $ with £ in font 4

Auto set of CGRAM offset for 135 x 240 ST7789 display

Correct sprite rendering
GC9A01 expects exact number of pixels to fill setWindow area.

tft_Write_16N was missing.

Setup for the ESP32 S2 with Adafruit ST7789 display

Declare header files for PlatformIO