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TFT_eSPI
Commit 8a239845 authored by Bodmer's avatar Bodmer
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RP2040: add SPI PIO interface option, enhance 8 bit parallel PIO 

The RP2040 processors can now drive 8 bit parallel and SPI displays using the PIO hardware.

The PIO offloads the processor by providing:
1. PIO managed setWindow sequence
2. PIO managed block and screen fill
parent 681eb9df
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Showing with 709 additions and 313 deletions
Extensions/Sprite.cpp
View file @ 8a239845
......@@ -37,6 +37,9 @@ TFT_eSprite::TFT_eSprite(TFT_eSPI *tft)
_colorMap = nullptr;
_psram_enable = true;
// Ensure end_tft_write() does nothing in inherited functions.
lockTransaction = true;
}
......
Processors/TFT_eSPI_ESP32.h
View file @ 8a239845
......@@ -322,7 +322,7 @@ SPI3_HOST = 2
// Create a bit set lookup table for data bus - wastes 1kbyte of RAM but speeds things up dramatically
// can then use e.g. GPIO.out_w1ts = set_mask(0xFF); to set data bus to 0xFF
#define CONSTRUCTOR_INIT_TFT_DATA_BUS \
#define PARALLEL_INIT_TFT_DATA_BUS \
for (int32_t c = 0; c<256; c++) \
{ \
xset_mask[c] = 0; \
......
Processors/TFT_eSPI_RP2040.c
View file @ 8a239845
This diff is collapsed.
Processors/TFT_eSPI_RP2040.h
View file @ 8a239845
......@@ -11,6 +11,7 @@
// Required for both the official and community board packages
#include "hardware/dma.h"
#include "hardware/pio.h"
#include "hardware/clocks.h"
// Processor ID reported by getSetup()
#define PROCESSOR_ID 0x2040
......@@ -18,8 +19,12 @@
// Include processor specific header
// None
#if defined (TFT_PARALLEL_8_BIT) || defined (RP2040_PIO_SPI)
#define RP2040_PIO_INTERFACE
#define RP2040_PIO_PUSHBLOCK
#endif
#if !defined (TFT_PARALLEL_8_BIT) // SPI
#if !defined (RP2040_PIO_INTERFACE)// SPI
// Use SPI0 as default if not defined
#ifndef TFT_SPI_PORT
#define TFT_SPI_PORT 0
......@@ -49,7 +54,7 @@
#define DMA_BUSY_CHECK
#endif
#if !defined (TFT_PARALLEL_8_BIT) // SPI
#if !defined (RP2040_PIO_INTERFACE) // SPI
// Initialise processor specific SPI functions, used by init()
#define INIT_TFT_DATA_BUS // Not used
......@@ -63,10 +68,6 @@
#define SUPPORT_TRANSACTIONS
#endif
#else
// Initialise TFT data bus
#define INIT_TFT_DATA_BUS
#define SPI_BUSY_CHECK
// ILI9481 needs a slower cycle time
// Byte rate = (CPU clock/(4 * divider))
......@@ -78,8 +79,17 @@
#define DIV_FRACT 0
#endif
// Initialise TFT data bus
#if defined (TFT_PARALLEL_8_BIT)
#define INIT_TFT_DATA_BUS pioinit(DIV_UNITS, DIV_FRACT);
#elif defined (RP2040_PIO_SPI)
#define INIT_TFT_DATA_BUS pioinit(SPI_FREQUENCY);
#endif
#define SPI_BUSY_CHECK
// Set the state machine clock divider (from integer and fractional parts - 16:8)
#define CONSTRUCTOR_INIT_TFT_DATA_BUS pioinit(TFT_D0, TFT_WR, DIV_UNITS, DIV_FRACT);
#define PARALLEL_INIT_TFT_DATA_BUS // Not used
#endif
......@@ -98,7 +108,7 @@
#define DC_C // No macro allocated so it generates no code
#define DC_D // No macro allocated so it generates no code
#else
#if !defined (TFT_PARALLEL_8_BIT) // SPI
#if !defined (RP2040_PIO_INTERFACE)// SPI
//#define DC_C sio_hw->gpio_clr = (1ul << TFT_DC)
//#define DC_D sio_hw->gpio_set = (1ul << TFT_DC)
#if defined (RPI_DISPLAY_TYPE)
......@@ -109,12 +119,13 @@
#define DC_D sio_hw->gpio_set = (1ul << TFT_DC)
#endif
#else
// PIO takes control of TFT_DC
// Must wait for data to flush through before changing DC line
#define DC_C WAIT_FOR_STALL; \
sio_hw->gpio_clr = (1ul << TFT_DC)
pio->sm[pio_sm].instr = pio_instr_clr_dc
// Flush has happened before this and mode changed back to 16 bit
#define DC_D sio_hw->gpio_set = (1ul << TFT_DC)
#define DC_D pio->sm[pio_sm].instr = pio_instr_set_dc
#endif
#endif
......@@ -125,12 +136,17 @@
#define CS_L // No macro allocated so it generates no code
#define CS_H // No macro allocated so it generates no code
#else
#if defined (RPI_DISPLAY_TYPE)
#define CS_L digitalWrite(TFT_CS, LOW);
#define CS_H digitalWrite(TFT_CS, HIGH);
#else
#if !defined (RP2040_PIO_INTERFACE) // SPI
#if defined (RPI_DISPLAY_TYPE)
#define CS_L digitalWrite(TFT_CS, LOW);
#define CS_H digitalWrite(TFT_CS, HIGH);
#else
#define CS_L sio_hw->gpio_clr = (1ul << TFT_CS)
#define CS_H sio_hw->gpio_set = (1ul << TFT_CS)
#endif
#else // PIO interface display
#define CS_L sio_hw->gpio_clr = (1ul << TFT_CS)
#define CS_H sio_hw->gpio_set = (1ul << TFT_CS)
#define CS_H WAIT_FOR_STALL; sio_hw->gpio_set = (1ul << TFT_CS)
#endif
#endif
......@@ -157,7 +173,7 @@
////////////////////////////////////////////////////////////////////////////////////////
// Define the touch screen chip select pin drive code
////////////////////////////////////////////////////////////////////////////////////////
#if !defined (TFT_PARALLEL_8_BIT) // SPI
#if !defined (RP2040_PIO_INTERFACE)// SPI
#if !defined TOUCH_CS || (TOUCH_CS < 0)
#define T_CS_L // No macro allocated so it generates no code
#define T_CS_H // No macro allocated so it generates no code
......@@ -181,7 +197,7 @@
////////////////////////////////////////////////////////////////////////////////////////
// Macros to write commands/pixel colour data to a SPI ILI948x TFT
////////////////////////////////////////////////////////////////////////////////////////
#if !defined (TFT_PARALLEL_8_BIT) // SPI
#if !defined (RP2040_PIO_INTERFACE) // SPI
#if defined (SPI_18BIT_DRIVER) // SPI 18 bit colour
......@@ -277,10 +293,10 @@
#endif // RPI_DISPLAY_TYPE
#endif
#else // Parallel 8 bit
#else // Parallel 8 bit or PIO SPI
// On it's own this does not appear to reliably detect a stall, found that we must wait
// for FIFO to empty before clearing the stall flag, and then wait for it to be set
// Wait for the PIO to stall (SM pull request finds no data in TX FIFO)
// This is used to detect when the SM is idle and hence ready for a jump instruction
#define WAIT_FOR_STALL pio->fdebug = pull_stall_mask; while (!(pio->fdebug & pull_stall_mask))
// Wait until at least "S" locations free
......@@ -306,8 +322,8 @@
// Have already waited for pio stalled (last data write complete) when DC switched to command mode
// The wait for stall allows DC to be changed immediately afterwards
#define tft_Write_8(C) pio->sm[pio_sm].instr = pio_instr_jmp8; \
TX_FIFO = C; \
WAIT_FOR_STALL; \
TX_FIFO = (C); \
WAIT_FOR_STALL
// Note: the following macros do not wait for the end of transmission
......@@ -317,7 +333,7 @@
#define tft_Write_16S(C) WAIT_FOR_FIFO_FREE(1); TX_FIFO = ((C)<<8) | ((C)>>8)
#define tft_Write_32(C) WAIT_FOR_FIFO_FREE(2); TX_FIFO = (C)>>16; TX_FIFO = (C)
#define tft_Write_32(C) WAIT_FOR_FIFO_FREE(2); TX_FIFO = ((C)>>16); TX_FIFO = (C)
#define tft_Write_32C(C,D) WAIT_FOR_FIFO_FREE(2); TX_FIFO = (C); TX_FIFO = (D)
......@@ -327,7 +343,7 @@
////////////////////////////////////////////////////////////////////////////////////////
// Macros to read from display using SPI or software SPI
////////////////////////////////////////////////////////////////////////////////////////
#if !defined (TFT_PARALLEL_8_BIT) // SPI
#if !defined (RP2040_PIO_INTERFACE)// SPI
#if defined (TFT_SDA_READ)
// Use a bit banged function call for STM32 and bi-directional SDA pin
#define TFT_eSPI_ENABLE_8_BIT_READ // Enable tft_Read_8(void);
......
Processors/TFT_eSPI_STM32.h
View file @ 8a239845
......@@ -308,7 +308,7 @@
// Mask for the 8 data bits to set pin directions (not used)
#define dir_mask 0
#define CONSTRUCTOR_INIT_TFT_DATA_BUS // None
#define PARALLEL_INIT_TFT_DATA_BUS // None
#define INIT_TFT_DATA_BUS // Setup built into TFT_eSPI.cpp
......
Processors/pio_8bit_parallel.pio
View file @ 8a239845
......@@ -10,32 +10,93 @@
.program tft_io
.side_set 1 opt ; The TFT_WR output.
// The C++ code switches between the 8 bits and 16 bits loops
// The C++ code switches between the different SM routines
// by waiting for the SM to be idle and setting its PC.
//
// The default SM routine is a 16 bit transfer
public start_32:
// Fetch the next 32 bit value from the TX FIFO and set TFT_WR high.
pull side 1
// Output byte, TFT_WR low.
out pins, 8 side 0 [1]
// Loop until 4 bytes sent, TFT_WR high.
jmp !osre, send_xy side 1 [1]
//Jump back to 16 bit
jmp start_16
// Do a block fill of N+1 pixels.
public block_fill:
// Fetch colour value.
pull side 1
// Move colour to x.
mov x, osr
// Fetch pixel count N (sends N+1 pixels).
pull
// Move pixel count to y.
mov y, osr
next:
// Copy colour value into osr, colour in LS 16 bits.
mov osr, x side 1
// Output colour 8 MS bits, unwanted top 16 bits shifted through.
out pins, 24 side 0 [1]
// Write first colour byte.
nop side 1 [1]
// Write second colour byte.
out pins, 8 side 0 [1]
// Decrement pixel count and loop.
jmp y--, next side 1
.wrap_target
// Transmit a 16 bit value (LS 16 bits of 32 bits).
public start_16:
// Fetch into OSR the next 32 bit value from the TX FIFO.
// This is a blocking operation. Sets WR high.
pull side 1
// Shift the OSR reg right by 8 bits, loading the low 8 bits
// of reg x with the shifted data.
out x, 8
// Write the first byte (MSB) and sets WR low. This also
// shift OSR by 8 bits which we don't care about.
out pins, 8 side 0 [1]
// Set TFT_WR back high.
nop side 1
// Move the LSB byte back to the OSR.
mov osr, x
// Fetch the next 32 bit value from the TX FIFO and set TFT_WR high.
pull side 1
// Write the first byte (MSB) and set WR low. This also
// shifts the unused top 16 bits through.
out pins, 24 side 0 [1]
// Set WR high and delay to next byte.
nop side 1 [1]
// Output the second byte and set TFT_WRITE low.
out pins, 8 side 0
jmp start_16
out pins, 8 side 0 [1]
// Set WR high and jump back to start.
jmp start_16 side 1
// 8 bit transfer
// Transmit an 8 bit value (LS 8 bits of 32 bits).
public start_8:
// Fetch into OSR the next 32 bit value from the TX FIFO.
// This is a blocking operation. Sets WR high.
// Fetch the next 32 bit value from the TX FIFO and set TFT_WR high.
pull side 1
// Write the first byte (LSB) and sets WR low. This also
// shifts the OSR right by 8 bits.
out pins, 8 side 0 [1]
// shifts the unused top 24 bits through.
out pins, 32 side 0 [1]
// Jump to start
jmp start_16 side 1
// Transmit a set window command sequence.
public set_addr_window:
// Loop count in x (to send caset, paset and ramwr commands).
set x, 2 side 1
pull_cmd:
// Set TFT_DC low.
set pins, 0
// Fetch caset, paset or ramwr.
pull
// Output LS byte (caset, paset or ramwr), discarding top 24 bits, set TFT_WR low.
out pins, 32 side 0
// Jump to end if 3rd cmd byte ramwr sent (x == 0)
jmp !x, end_set_addr
// pull next start and end coordinates, TFT_WR high.
pull side 1
// Set TFT_DC high.
set pins, 1
send_xy:
// Output byte, TFT_WR low.
out pins, 8 side 0 [1]
// Loop until 4 bytes sent, TFT_WR high.
jmp !osre, send_xy side 1 [1]
end_set_addr:
// Loop back for next command and write last command.
jmp x--, pull_cmd side 1
// Set DC high.
set pins, 1
// Auto-wrap back to start_16.
.wrap
\ No newline at end of file
Processors/pio_8bit_parallel.pio.h
View file @ 8a239845
......@@ -4,34 +4,64 @@
#pragma once
#if !PICO_NO_HARDWARE
#include "hardware/pio.h"
#endif
// ------ //
// tft_io //
// ------ //
#define tft_io_wrap_target 0
#define tft_io_wrap 8
#define tft_io_wrap_target 13
#define tft_io_wrap 31
#define tft_io_offset_start_16 0u
#define tft_io_offset_start_8 7u
#define tft_io_offset_start_32 0u
#define tft_io_offset_block_fill 4u
#define tft_io_offset_start_16 13u
#define tft_io_offset_start_8 18u
#define tft_io_offset_set_addr_window 21u
static const uint16_t tft_io_program_instructions[] = {
// .wrap_target
0x98a0, // 0: pull block side 1
0x6028, // 1: out x, 8
0x7108, // 2: out pins, 8 side 0 [1]
0xb842, // 3: nop side 1
0xa0e1, // 4: mov osr, x
0x7008, // 5: out pins, 8 side 0
0x0000, // 6: jmp 0
0x98a0, // 7: pull block side 1
0x7108, // 8: out pins, 8 side 0 [1]
0x7108, // 1: out pins, 8 side 0 [1]
0x19fc, // 2: jmp !osre, 28 side 1 [1]
0x000d, // 3: jmp 13
0x98a0, // 4: pull block side 1
0xa027, // 5: mov x, osr
0x80a0, // 6: pull block
0xa047, // 7: mov y, osr
0xb8e1, // 8: mov osr, x side 1
0x7118, // 9: out pins, 24 side 0 [1]
0xb942, // 10: nop side 1 [1]
0x7108, // 11: out pins, 8 side 0 [1]
0x1888, // 12: jmp y--, 8 side 1
// .wrap_target
0x98a0, // 13: pull block side 1
0x7118, // 14: out pins, 24 side 0 [1]
0xb942, // 15: nop side 1 [1]
0x7108, // 16: out pins, 8 side 0 [1]
0x180d, // 17: jmp 13 side 1
0x98a0, // 18: pull block side 1
0x7100, // 19: out pins, 32 side 0 [1]
0x180d, // 20: jmp 13 side 1
0xf822, // 21: set x, 2 side 1
0xe000, // 22: set pins, 0
0x80a0, // 23: pull block
0x7000, // 24: out pins, 32 side 0
0x003e, // 25: jmp !x, 30
0x98a0, // 26: pull block side 1
0xe001, // 27: set pins, 1
0x7108, // 28: out pins, 8 side 0 [1]
0x19fc, // 29: jmp !osre, 28 side 1 [1]
0x1856, // 30: jmp x--, 22 side 1
0xe001, // 31: set pins, 1
// .wrap
};
#if !PICO_NO_HARDWARE
static const struct pio_program tft_io_program = {
.instructions = tft_io_program_instructions,
.length = 9,
.length = 32,
.origin = -1,
};
......
Processors/pio_SPI.pio 0 → 100644
View file @ 8a239845
// Raspberry Pi Pico PIO program to output data to a TFT
// controller via a SPI output data path.
//"Set" set: 1 output pin, TFT_DC
// Side set: 1 output pin, TFT_SCLK
// Data set: 1 output pin, TFT_MOSI
.program tft_io
.side_set 1 opt ; The TFT_SCLK output.
// The C++ code switches between the 8 bits and 16 bits loops
// by waiting for the SM to be idle and setting its PC.
//
// 8 bit transfer
public start_8:
// Pull the next 32 bit value from the TX FIFO.
// Lose the top 24 bits
pull side 0
out null, 24
spi_out_8:
// Output the next 8 bits
out pins, 1 side 0
// Set TFT_SCLK high and jump for next bit
jmp !osre, spi_out_8 side 1
// Return to start
jmp start_16 side 0
public set_addr_window:
// Loop count in x for caset, paset and ramwr
set x, 2 side 0
pull_cmd:
// Set DC low
set pins, 0
// Fetch and output LS byte (caset, paset or ramwr), discarding top 24 bits, set WR low
pull side 0
out null, 24
next_cmd_bit:
out pins, 1 side 0
jmp !osre, next_cmd_bit side 1
// Set DC high
set pins, 1 side 0
// Finish if 3rd cmd byte ramwr sent (x == 0)
jmp !x, start_16
pull
next_xy:
// send 32 bit start and end coordinates
out pins, 1 side 0
jmp !osre, next_xy side 1
// Loop back for next command
jmp x--, pull_cmd side 0
// End
jmp start_16
public block_fill:
// Fetch colour value
pull side 0
// Move colour to x
mov x, osr
// Fetch pixel count
pull
// Move pixel count to y
mov y, osr
next_16:
// Copy colour value back into osr
mov osr, x side 0
// Lose the top 16 bits, send 1st bit
out pins, 17 side 0
nop side 1
next_bit:
// Output next 15 colour bits
out pins, 1 side 0
// Set TFT_SCLK high and jump for next bit
jmp !osre, next_bit side 1
// Decrement count and loop
jmp y--, next_16 side 0
// Now drop back to 16 bit output
.wrap_target
public start_16:
// Pull the next 32 bit value from the TX FIFO.
// Write the top 16 bits
pull side 0
out null, 16
spi_out_16:
// Output the next 16 bits
out pins, 1 side 0
// Set TFT_SCLK high and jump for next bit
jmp !osre, spi_out_16 side 1
// Return to start
.wrap
Processors/pio_SPI.pio.h 0 → 100644
View file @ 8a239845
// -------------------------------------------------- //
// This file is autogenerated by pioasm; do not edit! //
// -------------------------------------------------- //
#pragma once
#if !PICO_NO_HARDWARE
#include "hardware/pio.h"
#endif
// ------ //
// tft_io //
// ------ //
#define tft_io_wrap_target 28
#define tft_io_wrap 31
#define tft_io_offset_start_8 0u
#define tft_io_offset_set_addr_window 5u
#define tft_io_offset_block_fill 18u
#define tft_io_offset_start_16 28u
static const uint16_t tft_io_program_instructions[] = {
0x90a0, // 0: pull block side 0
0x6078, // 1: out null, 24
0x7001, // 2: out pins, 1 side 0
0x18e2, // 3: jmp !osre, 2 side 1
0x101c, // 4: jmp 28 side 0
0xf022, // 5: set x, 2 side 0
0xe000, // 6: set pins, 0
0x90a0, // 7: pull block side 0
0x6078, // 8: out null, 24
0x7001, // 9: out pins, 1 side 0
0x18e9, // 10: jmp !osre, 9 side 1
0xf001, // 11: set pins, 1 side 0
0x003c, // 12: jmp !x, 28
0x80a0, // 13: pull block
0x7001, // 14: out pins, 1 side 0
0x18ee, // 15: jmp !osre, 14 side 1
0x1046, // 16: jmp x--, 6 side 0
0x001c, // 17: jmp 28
0x90a0, // 18: pull block side 0
0xa027, // 19: mov x, osr
0x80a0, // 20: pull block
0xa047, // 21: mov y, osr
0xb0e1, // 22: mov osr, x side 0
0x7011, // 23: out pins, 17 side 0
0xb842, // 24: nop side 1
0x7001, // 25: out pins, 1 side 0
0x18f9, // 26: jmp !osre, 25 side 1
0x1096, // 27: jmp y--, 22 side 0
// .wrap_target
0x90a0, // 28: pull block side 0
0x6070, // 29: out null, 16
0x7001, // 30: out pins, 1 side 0
0x18fe, // 31: jmp !osre, 30 side 1
// .wrap
};
#if !PICO_NO_HARDWARE
static const struct pio_program tft_io_program = {
.instructions = tft_io_program_instructions,
.length = 32,
.origin = -1,
};
static inline pio_sm_config tft_io_program_get_default_config(uint offset) {
pio_sm_config c = pio_get_default_sm_config();
sm_config_set_wrap(&c, offset + tft_io_wrap_target, offset + tft_io_wrap);
sm_config_set_sideset(&c, 2, true, false);
return c;
}
#endif
README.md
View file @ 8a239845
A ["Discussions"](https://github.com/Bodmer/TFT_eSPI/discussions) facility has been added for Q&A etc. Use the ["Issues"](https://github.com/Bodmer/TFT_eSPI/issues) tab only for problems with the library. Thanks!
# News
1. DMA can now be used with the Raspberry Pi Pico (RP2040) when used with both 8 bit parallel and 16 bit colour SPI displays. See "Bouncy_Circles" sketch.
1. The RP2040 8 bit parallel interface uses the PIO. The PIO now manages the "setWindow" and "block fill" actions, releasing the processor for other tasks when areas of the screen are being filled with a colour. The PIO can optionally be used for SPI interface displays if #define RP2040_PIO_SPI is put in the setup file. Touch screens and pixel read operations are not supported when the PIO interface is used.
2. DMA can now be used with the Raspberry Pi Pico (RP2040) when used with both 8 bit parallel and 16 bit colour SPI displays. See "Bouncy_Circles" sketch.
["Bouncing circles"](https://www.youtube.com/watch?v=njFXIzCTQ_Q&lc=UgymaUIwOIuihvYh-Qt4AaABAg)
2. Support hase been added for the ESP32 S2 processor variant. A [new user setup](https://github.com/Bodmer/TFT_eSPI/blob/master/User_Setups/Setup70_ESP32_S2_ILI9341.h) file has been added as an example setup with an ILI9341 TFT. You will need to load ESP32 Arduino board package 2.0.0 or later to use the updated library with an ESP32.
3. Support hase been added for the ESP32 S2 processor variant. A [new user setup](https://github.com/Bodmer/TFT_eSPI/blob/master/User_Setups/Setup70_ESP32_S2_ILI9341.h) file has been added as an example setup with an ILI9341 TFT. You will need to load ESP32 Arduino board package 2.0.0 or later to use the updated library with an ESP32.
3. The library now supports the Raspberry Pi Pico with both the [official Arduino board package](https://github.com/arduino/ArduinoCore-mbed) and the one provided by [Earle Philhower](https://github.com/earlephilhower/arduino-pico). The setup file "Setup60_RP2040_ILI9341.h" has been used for tests with an ILI9341 display. At the moment only SPI interface displays have been tested. SPI port 0 is the default but SPI port 1 can be specifed in the setup file if those SPI pins are used.
4. The library now supports the Raspberry Pi Pico with both the [official Arduino board package](https://github.com/arduino/ArduinoCore-mbed) and the one provided by [Earle Philhower](https://github.com/earlephilhower/arduino-pico). The setup file "Setup60_RP2040_ILI9341.h" has been used for tests with an ILI9341 display. At the moment only SPI interface displays have been tested. SPI port 0 is the default but SPI port 1 can be specifed in the setup file if those SPI pins are used.
["Rotating cube demo"](https://www.youtube.com/watch?v=4fPxEN9ImVE)
4. Viewports can now be applied to sprites e.g. spr.setViewport(5, 5, 20, 20); so graphics can be restricted to a particular area of the sprite. This operates in the same way as the TFT viewports, see 5. below.
5. Viewports can now be applied to sprites e.g. spr.setViewport(5, 5, 20, 20); so graphics can be restricted to a particular area of the sprite. This operates in the same way as the TFT viewports, see 5. below.
5. The library now provides a "viewport" capability. See "Viewport_Demo" and "Viewport_graphicstest" examples. When a viewport is defined graphics will only appear within that window. The coordinate datum by default moves to the top left corner of the viewport, but can optionally remain at top left corner of TFT. The GUIslice library will make use of this feature to speed up the rendering of GUI objects ([see #769](https://github.com/Bodmer/TFT_eSPI/issues/769)).
6. The library now provides a "viewport" capability. See "Viewport_Demo" and "Viewport_graphicstest" examples. When a viewport is defined graphics will only appear within that window. The coordinate datum by default moves to the top left corner of the viewport, but can optionally remain at top left corner of TFT. The GUIslice library will make use of this feature to speed up the rendering of GUI objects ([see #769](https://github.com/Bodmer/TFT_eSPI/issues/769)).
6. The library now supports SSD1963 based screen, this has been tested on a [480x800 screen](https://www.buydisplay.com/7-tft-screen-touch-lcd-display-module-w-ssd1963-controller-board-mcu) with an ESP32. The interface is 8 bit parallel only as that controller does not support a SPI interface.
7. The library now supports SSD1963 based screen, this has been tested on a [480x800 screen](https://www.buydisplay.com/7-tft-screen-touch-lcd-display-module-w-ssd1963-controller-board-mcu) with an ESP32. The interface is 8 bit parallel only as that controller does not support a SPI interface.
7. A companion library [U8g2_for_TFT_eSPI](https://github.com/Bodmer/U8g2_for_TFT_eSPI) has been created to allow U8g2 library fonts to be used with TFT_eSPI.
8. A companion library [U8g2_for_TFT_eSPI](https://github.com/Bodmer/U8g2_for_TFT_eSPI) has been created to allow U8g2 library fonts to be used with TFT_eSPI.
8. The library now supports SPI DMA transfers for both ESP32 and STM32 processors. The DMA Test examples now work on the ESP32 for SPI displays (excluding RPi type and ILI9488).
9. The library now supports SPI DMA transfers for both ESP32 and STM32 processors. The DMA Test examples now work on the ESP32 for SPI displays (excluding RPi type and ILI9488).
9. A new option has been added for STM32 processors to optimise performance where Port A (or B) pins 0-7 are used for the 8 bit parallel interface data pins 0-7 to the TFT. This gives a dramatic 8 times better rendering performance for the lower clock rate STM32 processors such as the STM32F103 "Blue Pill" or STM411 "Black Pill" since no time consuming data bit manipulation is required. See setup file "User_Setups/Setup35_ILI9341_STM32_Port_Bus.h".
10. A new option has been added for STM32 processors to optimise performance where Port A (or B) pins 0-7 are used for the 8 bit parallel interface data pins 0-7 to the TFT. This gives a dramatic 8 times better rendering performance for the lower clock rate STM32 processors such as the STM32F103 "Blue Pill" or STM411 "Black Pill" since no time consuming data bit manipulation is required. See setup file "User_Setups/Setup35_ILI9341_STM32_Port_Bus.h".
# TFT_eSPI
......
TFT_eSPI.cpp
View file @ 8a239845
This diff is collapsed.
TFT_eSPI.h
View file @ 8a239845
......@@ -16,7 +16,7 @@
#ifndef _TFT_eSPIH_
#define _TFT_eSPIH_
#define TFT_ESPI_VERSION "2.4.2"
#define TFT_ESPI_VERSION "2.4.21"
// Bit level feature flags
// Bit 0 set: viewport capability
......@@ -724,6 +724,9 @@ class TFT_eSPI : public Print { friend class TFT_eSprite; // Sprite class has ac
inline void begin_tft_read() __attribute__((always_inline));
inline void end_tft_read() __attribute__((always_inline));
// Initialise the data bus GPIO and hardware interfaces
void initBus(void);
// Temporary library development function TODO: remove need for this
void pushSwapBytePixels(const void* data_in, uint32_t len);
......
User_Setup.h
View file @ 8a239845
......@@ -313,6 +313,9 @@
//
// ##################################################################################
// For RP2040 processor and SPI displays, uncomment the following line to use the PIO interface.
//#define RP2040_PIO_SPI // Leave commented out to use standard RP2040 SPI port interface
// For the RP2040 processor define the SPI port channel used (default 0 if undefined)
//#define TFT_SPI_PORT 1 // Set to 0 if SPI0 pins are used, or 1 if spi1 pins used
......
User_Setup_Select.h
View file @ 8a239845
......@@ -90,6 +90,7 @@
//#include <User_Setups/Setup102_RP2040_ILI9341_parallel.h>
//#include <User_Setups/Setup103_RP2040_ILI9486_parallel.h>
//#include <User_Setups/Setup104_RP2040_ST7796_parallel.h>
//#include <User_Setups/Setup105_RP2040_ILI9341_PIO_SPI.h> // Setup file for Raspberry Pi Pico with SPI PIO interface and ILI9341
//#include <User_Setups/Setup135_ST7789.h> // Setup file for ESP8266 and ST7789 135 x 240 TFT
......
examples/Test and diagnostics/Read_User_Setup/Read_User_Setup.ino
View file @ 8a239845
......@@ -153,6 +153,7 @@ void printProcessorName(void)
if ( user.esp == 0x8266) Serial.println("ESP8266");
if ( user.esp == 0x32) Serial.println("ESP32");
if ( user.esp == 0x32F) Serial.println("STM32");
if ( user.esp == 0x2040) Serial.println("RP2040");
if ( user.esp == 0x0000) Serial.println("Generic");
}
......
library.json
View file @ 8a239845
{
"name": "TFT_eSPI",
"version": "2.4.2",
"version": "2.4.21",
"keywords": "Arduino, tft, ePaper, display, Pico, RP2040, STM32, ESP8266, NodeMCU, ESP32, M5Stack, ILI9341, ST7735, ILI9163, S6D02A1, ILI9481, ILI9486, ILI9488, ST7789, RM68140, SSD1351, SSD1963, ILI9225, HX8357D",
"description": "A TFT and ePaper SPI graphics library with optimisation for Raspberry Pi Pico, ESP8266, ESP32 and STM32",
"repository":
......
library.properties
View file @ 8a239845
name=TFT_eSPI
version=2.4.2
version=2.4.21
author=Bodmer
maintainer=Bodmer
sentence=TFT graphics library for Arduino processors with performance optimisation for RP2040, STM32, ESP8266 and ESP32
......
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