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Reduces esp8266 code size by about 230 bytes.

This is an often used code pattern, and its use reduces code size of the
core by about 100 bytes.

Added options to make deploy so it can be used for ESP8266 boards with
other flash configurations.  For example NodeMCU DEVKIT V1.0 can now use:

    $ make FLASH_MODE=dio FLASH_SIZE=32m deploy

The deleted code is unreachable because calcsize_items guarantees that
num_items corresponds to how many items there are in fmt to unpack.

SHA1 can only be supported if ussl module is compiled in, and it uses
axtls.

The output might contain more than one line ending in 5b so properly skip
everything until the next known point.
This fixes test failures in appveyor debug builds.

Implementation of machine.RTC.alarm_left(), like described in the
documentation.

Fully self-hosted release (without fallbacks), and uses stream gzip
decompression (step towards support for limited-heap baremetal systems).

upip will use first non-empty component in sys.path as an install path
(if MICROPYPATH envvar is not set, like it will be for baremetal targets).

Useful to better understand esp8266 inner workings and compare behavior
in different cases.

Disabled until a proper fix is found.

In particular, this makes the L4 .isr_vector section 16K in size so it's
the same as the F4/F7 MCUs.  The patch also moves the L4 filesystem to
the end of flash, which allows for 512K filesystem on the 1Mb devices
like the STM32L476DISC.

If a port defines MICROPY_PY_MACHINE_SPI_MIN_DELAY then it can use a
faster software SPI loop that does not make calls to the delay_us
function.

The delay_half parameter must be specified by the port to set up the
timing of the software SPI.  This allows the port to adjust the timing
value to better suit its timing characteristics, as well as provide a
more accurate printing of the baudrate.

It's simpler to just default to always using software SPI if no specific
peripheral id/name is given.  To use hardware SPI users must specify a
hardware peripheral id as the first parameter to the SPI constructor.

Includes both software and hardware SPI implementations.