Commit ff6c2adf authored by Jim Mussared's avatar Jim Mussared Committed by Damien George

stm32/boards/make-pins.py: Add initial support for H7 dual-pad pins.

This fixes the H7 af.csv files to include the dual-pad information, by
listing the ADCs supported on the _C pad with a C_ADC prefix.

Minimal change to make-pins.py to ignore these entries. This will be
implemented later to emit constants (similar to ADC.CORE_TEMP) to access
these channels.

This work was funded through GitHub Sponsors.
Signed-off-by: default avatarJim Mussared <jim.mussared@gmail.com>
parent 724ebb99
......@@ -124,6 +124,11 @@ class Stm32Pin(boardgen.Pin):
# be the P for one channel, and the N for a different channel.
# e.g. "ADC123_INP12/ADC123_INN11".
for adc_name in adc.split("/"):
if adc_name.startswith("C_"):
# Currently unsupported, H7 dual-pad. The C_ADC entries should
# only be available directly from machine.ADC (not via the pin
# object).
continue
m = re.match("ADC([1-5]+)_(IN[NP]?)([0-9]+)$", adc_name)
if not m:
raise boardgen.PinGeneratorError(
......
......@@ -34,8 +34,8 @@ PortB,PB14, ,TIM1_CH2N ,TIM12_CH1
PortB,PB15,RTC_REFIN ,TIM1_CH3N ,TIM12_CH2 ,TIM8_CH3N ,USART1_RX ,SPI2_MOSI/I2S2_SDO ,DFSDM1_CKIN2 , ,UART4_CTS ,SDMMC2_D1 , , ,FMC_D11/FMC_AD11 , ,LCD_G7 ,EVENTOUT,
PortC,PC0 , ,FMC_D12/FMC_AD12 , ,DFSDM1_CKIN0 , , ,DFSDM1_DATIN4 , ,SAI4_FS_B ,FMC_A25 ,OTG_HS_ULPI_STP ,LCD_G2 ,FMC_SDNWE , ,LCD_R5 ,EVENTOUT,ADC123_INP10
PortC,PC1 ,TRACED0 ,SAI4_D1 ,SAI1_D1 ,DFSDM1_DATIN0 ,DFSDM1_CKIN4 ,SPI2_MOSI/I2S2_SDO ,SAI1_SD_A , ,SAI4_SD_A ,SDMMC2_CK ,OCTOSPIM_P1_IO4 ,ETH_MDC ,MDIOS_MDC , ,LCD_G5 ,EVENTOUT,ADC123_INP11/ADC123_INN10
PortC,PC2 ,PWR_DEEPSLEEP, , ,DFSDM1_CKIN1 ,OCTOSPIM_P1_IO5 ,SPI2_MISO/I2S2_SDI ,DFSDM1_CKOUT , , ,OCTOSPIM_P1_IO2 ,OTG_HS_ULPI_DIR ,ETH_MII_TXD2 ,FMC_SDNE0 , , ,EVENTOUT,ADC123_INP12/ADC123_INN11
PortC,PC3 ,PWR_SLEEP , , ,DFSDM1_DATIN1 ,OCTOSPIM_P1_IO6 ,SPI2_MOSI/I2S2_SDO , , , ,OCTOSPIM_P1_IO0 ,OTG_HS_ULPI_NXT ,ETH_MII_TX_CLK ,FMC_SDCKE0 , , ,EVENTOUT,ADC123_INP13/ADC123_INN12
PortC,PC2 ,PWR_DEEPSLEEP, , ,DFSDM1_CKIN1 ,OCTOSPIM_P1_IO5 ,SPI2_MISO/I2S2_SDI ,DFSDM1_CKOUT , , ,OCTOSPIM_P1_IO2 ,OTG_HS_ULPI_DIR ,ETH_MII_TXD2 ,FMC_SDNE0 , , ,EVENTOUT,ADC123_INP12/ADC123_INN11/C_ADC3_INN1/C_ADC3_INP0
PortC,PC3 ,PWR_SLEEP , , ,DFSDM1_DATIN1 ,OCTOSPIM_P1_IO6 ,SPI2_MOSI/I2S2_SDO , , , ,OCTOSPIM_P1_IO0 ,OTG_HS_ULPI_NXT ,ETH_MII_TX_CLK ,FMC_SDCKE0 , , ,EVENTOUT,ADC12_INP13/ADC12_INN12/C_ADC3_INP1
PortC,PC4 ,PWR_DEEPSLEEP,FMC_A22 , ,DFSDM1_CKIN2 , ,I2S1_MCK , , , ,SPDIFRX1_IN3 ,SDMMC2_CKIN ,ETH_MII_RXD0/ETH_RMII_RXD0 ,FMC_SDNE0 , ,LCD_R7 ,EVENTOUT,ADC12_INP4
PortC,PC5 ,PWR_SLEEP ,SAI4_D3 ,SAI1_D3 ,DFSDM1_DATIN2 ,PSSI_D15 , , , , ,SPDIFRX1_IN4 ,OCTOSPIM_P1_DQS ,ETH_MII_RXD1/ETH_RMII_RXD1 ,FMC_SDCKE0 ,COMP1_OUT ,LCD_DE ,EVENTOUT,ADC12_INP8/ADC12_INN4
PortC,PC6 , , ,TIM3_CH1 ,TIM8_CH1 ,DFSDM1_CKIN3 ,I2S2_MCK , ,USART6_TX ,SDMMC1_D0DIR ,FMC_NWAIT ,SDMMC2_D6 , ,SDMMC1_D6 ,DCMI_D0/PSSI_D0 ,LCD_HSYNC ,EVENTOUT,
......
Port ,Pin ,AF0 ,AF1 ,AF2 ,AF3 ,AF4 ,AF5 ,AF6 ,AF7 ,AF8 ,AF9 ,AF10 ,AF11 ,AF12 ,AF13 ,AF14 ,AF15 ,ADC
, ,SYS ,TIM1/2/16/17/LPTIM1/HRTIM1,SAI1/TIM3/4/5/12/HRTIM1,LPUART/TIM8/LPTIM2/3/4/5/HRTIM1/DFSDM,I2C1/2/3/4/USART1/TIM15/LPTIM2/DFSDM/CEC,SPI1/2/3/4/5/6/CEC,SPI2/3/SAI1/3/I2C4/UART4/DFSDM,SPI2/3/6/USART1/2/3/6/UART7/SDMMC1,SPI6/SAI2/4/UART4/5/8/LPUART/SDMMC1/SPDIFRX,SAI4/FDCAN1/2/TIM13/14/QUADSPI/FMC/SDMMC2/LCD/SPDIFRX,SAI2/4/TIM8/QUADSPI/SDMMC2/OTG1_HS/OTG2_FS/LCD,I2C4/UART7/SWPMI1/TIM1/8/DFSDM/SDMMC2/MDIOS/ETH,TIM1/8/FMC/SDMMC1/MDIOS/OTG1_FS/LCD,TIM1/DCMI/LCD/COMP,UART5/LCD,SYS ,ADC
PortA,PA0 , ,TIM2_CH1/TIM2_ETR ,TIM5_CH1 ,TIM8_ETR ,TIM15_BKIN , , ,USART2_CTS/USART2_NSS ,UART4_TX ,SDMMC2_CMD ,SAI2_SD_B ,ETH_MII_CRS , , , ,EVENTOUT,ADC1_INP16/ADC12_INN1/ADC12_INP0
PortA,PA1 , ,TIM2_CH2 ,TIM5_CH2 ,LPTIM3_OUT ,TIM15_CH1N , , ,USART2_RTS ,UART4_RX ,QUADSPI_BK1_IO3 ,SAI2_MCK_B ,ETH_MII_RX_CLK/ETH_RMII_REF_CLK , , ,LCD_R2 ,EVENTOUT,ADC1_INN16/ADC1_INP17/ADC12_INP1
PortA,PA0 , ,TIM2_CH1/TIM2_ETR ,TIM5_CH1 ,TIM8_ETR ,TIM15_BKIN , , ,USART2_CTS/USART2_NSS ,UART4_TX ,SDMMC2_CMD ,SAI2_SD_B ,ETH_MII_CRS , , , ,EVENTOUT,ADC1_INP16/C_ADC12_INN1/C_ADC12_INP0
PortA,PA1 , ,TIM2_CH2 ,TIM5_CH2 ,LPTIM3_OUT ,TIM15_CH1N , , ,USART2_RTS ,UART4_RX ,QUADSPI_BK1_IO3 ,SAI2_MCK_B ,ETH_MII_RX_CLK/ETH_RMII_REF_CLK , , ,LCD_R2 ,EVENTOUT,ADC1_INN16/ADC1_INP17/C_ADC12_INP1
PortA,PA2 , ,TIM2_CH3 ,TIM5_CH3 ,LPTIM4_OUT ,TIM15_CH1 , , ,USART2_TX ,SAI2_SCK_B , , ,ETH_MDIO ,MDIOS_MDIO , ,LCD_R1 ,EVENTOUT,ADC12_INP14
PortA,PA3 , ,TIM2_CH4 ,TIM5_CH4 ,LPTIM5_OUT ,TIM15_CH2 , , ,USART2_RX , ,LCD_B2 ,OTG_HS_ULPI_D0 ,ETH_MII_COL , , ,LCD_B5 ,EVENTOUT,ADC12_INP15
PortA,PA4 , , ,TIM5_ETR , , ,SPI1_NSS/I2S1_WS ,SPI3_NSS/I2S3_WS ,USART2_CK ,SPI6_NSS , , , ,OTG_HS_SOF ,DCMI_HSYNC ,LCD_VSYNC,EVENTOUT,ADC12_INP18
......@@ -34,8 +34,8 @@ PortB,PB14, ,TIM1_CH2N ,TIM12_CH1 ,TIM8
PortB,PB15,RTC_REFIN ,TIM1_CH3N ,TIM12_CH2 ,TIM8_CH3N ,USART1_RX ,SPI2_MOSI/I2S2_SDO,DFSDM_CKIN2 , ,UART4_CTS ,SDMMC2_D1 , , ,OTG_HS_DP , , ,EVENTOUT,
PortC,PC0 , , , ,DFSDM_CKIN0 , , ,DFSDM_DATIN4 , ,SAI2_FS_B , ,OTG_HS_ULPI_STP , ,FMC_SDNWE , ,LCD_R5 ,EVENTOUT,ADC123_INP10
PortC,PC1 ,TRACED0 , ,SAI1_D1 ,DFSDM_DATIN0 ,DFSDM_CKIN4 ,SPI2_MOSI/I2S2_SDO,SAI1_SD_A , ,SAI4_SD_A ,SDMMC2_CK ,SAI4_D1 ,ETH_MDC ,MDIOS_MDC , , ,EVENTOUT,ADC123_INN10/ADC123_INP11
PortC,PC2 , , , ,DFSDM_CKIN1 , ,SPI2_MISO/I2S2_SDI,DFSDM_CKOUT , , , ,OTG_HS_ULPI_DIR ,ETH_MII_TXD2 ,FMC_SDNE0 , , ,EVENTOUT,ADC123_INN11/ADC123_INP12/ADC3_INN1/ADC3_INP0
PortC,PC3 , , , ,DFSDM_DATIN1 , ,SPI2_MOSI/I2S2_SDO, , , , ,OTG_HS_ULPI_NXT ,ETH_MII_TX_CLK ,FMC_SDCKE0 , , ,EVENTOUT,ADC12_INN12/ADC12_INP13/ADC3_INP1
PortC,PC2 , , , ,DFSDM_CKIN1 , ,SPI2_MISO/I2S2_SDI,DFSDM_CKOUT , , , ,OTG_HS_ULPI_DIR ,ETH_MII_TXD2 ,FMC_SDNE0 , , ,EVENTOUT,ADC123_INN11/ADC123_INP12/C_ADC3_INN1/C_ADC3_INP0
PortC,PC3 , , , ,DFSDM_DATIN1 , ,SPI2_MOSI/I2S2_SDO, , , , ,OTG_HS_ULPI_NXT ,ETH_MII_TX_CLK ,FMC_SDCKE0 , , ,EVENTOUT,ADC12_INN12/ADC12_INP13/C_ADC3_INP1
PortC,PC4 , , , ,DFSDM_CKIN2 , ,I2S1_MCK , , , ,SPDIFRX_IN2 , ,ETH_MII_RXD0/ETH_RMII_RXD0 ,FMC_SDNE0 , , ,EVENTOUT,ADC12_INP4
PortC,PC5 , , ,SAI1_D3 ,DFSDM_DATIN2 , , , , , ,SPDIFRX_IN3 ,SAI4_D3 ,ETH_MII_RXD1/ETH_RMII_RXD1 ,FMC_SDCKE0 ,COMP_1_OUT , ,EVENTOUT,ADC12_INN4/ADC12_INP8
PortC,PC6 , ,HRTIM_CHA1 ,TIM3_CH1 ,TIM8_CH1 ,DFSDM_CKIN3 ,I2S2_MCK , ,USART6_TX ,SDMMC1_D0DIR ,FMC_NWAIT ,SDMMC2_D6 , ,SDMMC1_D6 ,DCMI_D0 ,LCD_HSYNC,EVENTOUT,
......
This diff is collapsed.
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment