stm32/boards/pllvalues.py: Relax PLLQ constraints on STM32F413 MCUs.

Signed-off-by: Damien George <damien@micropython.org>

ports/stm32/Makefile

@@ -750,7 +750,7 @@ CMSIS_MCU_HDR = $(CMSIS_DIR)/$(CMSIS_MCU_LOWER).h
 modmachine.c: $(GEN_PLLFREQTABLE_HDR)
 $(GEN_PLLFREQTABLE_HDR): $(PLLVALUES) | $(HEADER_BUILD)
 	$(ECHO) "GEN $@"
-	$(Q)$(PYTHON) $(PLLVALUES) -c -m $(MCU_SERIES) file:$(BOARD_DIR)/stm32$(MCU_SERIES)xx_hal_conf.h > $@
+	$(Q)$(PYTHON) $(PLLVALUES) -c -m $(CMSIS_MCU_LOWER) file:$(BOARD_DIR)/stm32$(MCU_SERIES)xx_hal_conf.h > $@
 
 $(BUILD)/modstm.o: $(GEN_STMCONST_HDR)
 # Use a pattern rule here so that make will only call make-stmconst.py once to

ports/stm32/boards/pllvalues.py

@@ -240,7 +240,7 @@ def main():
     argv = sys.argv[1:]
 
     c_table = False
-    mcu_series = "f4"
+    mcu_series = "stm32f4"
     hse = None
     hsi = None
 
@@ -271,13 +271,13 @@ def main():
         hse = int(argv[0])
 
     # Select MCU parameters
-    if mcu_series == "h7":
+    if mcu_series.startswith("stm32h7"):
         mcu = mcu_h7
     else:
         mcu = mcu_default
 
-    # Relax constraight on PLLQ being 48MHz on F7 and H7 MCUs, which have separate PLLs for 48MHz
-    relax_pll48 = mcu_series in ("f7", "h7")
+    # Relax constraint on PLLQ being 48MHz on MCUs which have separate PLLs for 48MHz
+    relax_pll48 = mcu_series.startswith(("stm32f413", "stm32f7", "stm32h7"))
 
     hse_valid_plls = compute_pll_table(hse, relax_pll48)
     if hsi is not None: