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xpstem
micropython
Commits
c040961e
Commit
c040961e
authored
Dec 04, 2018
by
Damien George
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stm32/boards: Add configuration for putting mboot on PYBv1.x.
parent
eed522d6
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ports/stm32/boards/PYBV10/mpconfigboard.h
ports/stm32/boards/PYBV10/mpconfigboard.h
+6
-0
ports/stm32/boards/PYBV10/mpconfigboard.mk
ports/stm32/boards/PYBV10/mpconfigboard.mk
+7
-0
ports/stm32/boards/PYBV11/mpconfigboard.h
ports/stm32/boards/PYBV11/mpconfigboard.h
+6
-0
ports/stm32/boards/PYBV11/mpconfigboard.mk
ports/stm32/boards/PYBV11/mpconfigboard.mk
+7
-0
ports/stm32/boards/common_blifs.ld
ports/stm32/boards/common_blifs.ld
+86
-0
No files found.
ports/stm32/boards/PYBV10/mpconfigboard.h
View file @
c040961e
...
...
@@ -100,3 +100,9 @@
// MMA accelerometer config
#define MICROPY_HW_MMA_AVDD_PIN (pin_B5)
// Bootloader configuration (only needed if Mboot is used)
#define MBOOT_I2C_PERIPH_ID 1
#define MBOOT_I2C_SCL (pin_B8)
#define MBOOT_I2C_SDA (pin_B9)
#define MBOOT_I2C_ALTFUNC (4)
ports/stm32/boards/PYBV10/mpconfigboard.mk
View file @
c040961e
MCU_SERIES
=
f4
CMSIS_MCU
=
STM32F405xx
AF_FILE
=
boards/stm32f405_af.csv
ifeq
($(USE_MBOOT),1)
# When using Mboot all the text goes together after the filesystem
LD_FILES
=
boards/stm32f405.ld boards/common_blifs.ld
TEXT0_ADDR
=
0x08020000
else
# When not using Mboot the ISR text goes first, then the rest after the filesystem
LD_FILES
=
boards/stm32f405.ld boards/common_ifs.ld
TEXT0_ADDR
=
0x08000000
TEXT1_ADDR
=
0x08020000
endif
ports/stm32/boards/PYBV11/mpconfigboard.h
View file @
c040961e
...
...
@@ -100,3 +100,9 @@
// MMA accelerometer config
#define MICROPY_HW_MMA_AVDD_PIN (pin_B5)
// Bootloader configuration (only needed if Mboot is used)
#define MBOOT_I2C_PERIPH_ID 1
#define MBOOT_I2C_SCL (pin_B8)
#define MBOOT_I2C_SDA (pin_B9)
#define MBOOT_I2C_ALTFUNC (4)
ports/stm32/boards/PYBV11/mpconfigboard.mk
View file @
c040961e
MCU_SERIES
=
f4
CMSIS_MCU
=
STM32F405xx
AF_FILE
=
boards/stm32f405_af.csv
ifeq
($(USE_MBOOT),1)
# When using Mboot all the text goes together after the filesystem
LD_FILES
=
boards/stm32f405.ld boards/common_blifs.ld
TEXT0_ADDR
=
0x08020000
else
# When not using Mboot the ISR text goes first, then the rest after the filesystem
LD_FILES
=
boards/stm32f405.ld boards/common_ifs.ld
TEXT0_ADDR
=
0x08000000
TEXT1_ADDR
=
0x08020000
endif
ports/stm32/boards/common_blifs.ld
0 → 100644
View file @
c040961e
/* Memory layout for bootloader and internal filesystem configuration (this here describes the app part):
FLASH_TEXT .isr_vector
FLASH_TEXT .text
FLASH_TEXT .data
RAM .data
RAM .bss
RAM .heap
RAM .stack
*/
ENTRY(Reset_Handler)
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH_TEXT
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text*) /* .text* sections (code) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_TEXT
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
. = . + _minimum_heap_size;
. = ALIGN(4);
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
.ARM.attributes 0 : { *(.ARM.attributes) }
}
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