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duo-buildroot-sdk
Commit 694372a5 authored by forum_service's avatar forum_service Committed by carbon
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build: version release v4.1.0.3 

faad783e add gc1084 slave
063ae4ac [sensor] add new sensor cv4001
4aef0349 [sensor] add new sensor gc1084 config
d553a348 Add support for CV1812CP eMMC.
f74513a8 [audio][lt6911] add drivers
245f21a6 [sensor] add sensor mis2008_1l
e428a8fe [sensor] add sc2336_1L

Change-Id: I32294015e76a8edc737a8f17e0aade192b3bd90d
parent 0e1c8ece
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Showing with 2030 additions and 1336 deletions
build/Kconfig
View file @ 694372a5
......@@ -488,12 +488,6 @@ config ROOTFS_OVERLAYFS
help
Enable rootfs with overlayfs.
config BUILDROOT_FS
bool "Enable buildroot generate rootfs"
default n
help
Enable buildroot generate rootfs.
config USE_4K_ERASE_SIZE_FOR_JFFS2
bool "Use 4K erase size for jffs2 filesystem"
default n
......
build/Makefile
View file @ 694372a5
......@@ -542,67 +542,10 @@ define raw2cimg
${Q}python3 $(COMMON_TOOLS_PATH)/image_tool/raw2cimg.py $(OUTPUT_DIR)/rawimages/${1} $(OUTPUT_DIR) $(FLASH_PARTITION_XML)
endef
# BR_OVERLAY_DIR
# BR_ROOTFS_RAWIMAGE
br-rootfs-prepare:export CROSS_COMPILE_KERNEL=$(patsubst "%",%,$(CONFIG_CROSS_COMPILE_KERNEL))
br-rootfs-prepare:export CROSS_COMPILE_SDK=$(patsubst "%",%,$(CONFIG_CROSS_COMPILE_SDK))
br-rootfs-prepare:
$(call print_target)
ifneq ($(STORAGE_TYPE), sd)
${Q}cp -r ${RAMDISK_PATH}/rootfs/buildroot_fs/arm/* $(BR_ROOTFS_DIR)
$(call TARGET_PACKAGE_INSTALL_BR_ROOTFS)
${Q}mkdir -p $(BR_ROOTFS_DIR)/etc/init.d/
${Q}python3 $(COMMON_TOOLS_PATH)/image_tool/create_automount.py $(FLASH_PARTITION_XML) $(BR_ROOTFS_DIR)/etc/init.d/
# Generate /etc/fw_env.config
# ${Q}mkdir -p $(BR_ROOTFS_DIR)/etc
${Q}python3 $(COMMON_TOOLS_PATH)/image_tool/mkcvipart.py $(FLASH_PARTITION_XML) $(BR_ROOTFS_DIR)/etc --fw_env
endif
# copy ko and mmf libs
${Q}mkdir -p $(BR_ROOTFS_DIR)/mnt/system
${Q}cp -arf ${SYSTEM_OUT_DIR}/* $(BR_ROOTFS_DIR)/mnt/system/
# strip
${Q}find $(BR_ROOTFS_DIR) -name "*.ko" -type f -printf 'striping %p\n' -exec $(CROSS_COMPILE_KERNEL)strip --strip-unneeded {} \;
${Q}find $(BR_ROOTFS_DIR) -name "*.so*" -type f -printf 'striping %p\n' -exec $(CROSS_COMPILE_KERNEL)strip --strip-all {} \;
${Q}find $(BR_ROOTFS_DIR) -executable -type f ! -name "*.sh" ! -path "*etc*" ! -path "*.ko" -printf 'striping %p\n' -exec $(CROSS_COMPILE_SDK)strip --strip-all {} 2>/dev/null \;
${Q}mkdir -p $(BR_OVERLAY_DIR)
${Q}cp -arf $(BR_ROOTFS_DIR)/* $(BR_OVERLAY_DIR)
br-rootfs-pack:export TARGET_OUTPUT_DIR=$(BR_DIR)/output/$(BR_BOARD)
br-rootfs-pack:
$(call print_target)
${Q}$(MAKE) -C $(BR_DIR) $(BR_DEFCONFIG) BR2_TOOLCHAIN_EXTERNAL_PATH=$(CROSS_COMPILE_PATH)
${Q}$(MAKE) -j${NPROC} -C $(BR_DIR)
# ${Q}rm -rf $(BR_ROOTFS_DIR)/*
# copy rootfs to rawimg dir
${Q}cp $(TARGET_OUTPUT_DIR)/images/rootfs.ext4 $(OUTPUT_DIR)/rawimages/rootfs_ext4.$(STORAGE_TYPE)
$(call raw2cimg ,rootfs_ext4.$(STORAGE_TYPE))
ifeq ($(CONFIG_BUILDROOT_FS),y)
rootfs:br-rootfs-prepare
rootfs:br-rootfs-pack
else
rootfs:rootfs-pack
rootfs:
$(call print_target)
ifneq ($(STORAGE_TYPE), sd)
$(call raw2cimg ,rootfs.$(STORAGE_TYPE))
endif
endif
sd_image:
$(call print_target)
-${Q}rm $(OUTPUT_DIR)/fs
ifeq ($(CONFIG_BUILDROOT_FS),y)
${Q}rm $(OUTPUT_DIR)/br-rootfs -rf
${Q}ln -s $(OUTPUT_DIR)/br-rootfs $(OUTPUT_DIR)/fs
${Q}mkdir $(OUTPUT_DIR)/br-rootfs
${Q}tar xvf $(BR_DIR)/output/$(BR_BOARD)/images/rootfs.tar.xz -C $(OUTPUT_DIR)/br-rootfs
else
${Q}ln -s $(OUTPUT_DIR)/rootfs $(OUTPUT_DIR)/fs
endif
$(COMMON_TOOLS_PATH)/sd_tools/sd_gen_burn_image.sh $(OUTPUT_DIR)
jffs2:
$(call print_target)
......
build/boards/cv180x/cv1800b_wevb_0008a_spinor/cv1800b_wevb_0008a_spinor_defconfig
View file @ 694372a5
......@@ -43,3 +43,4 @@ CONFIG_TARGET_PACKAGE_NTP=y
CONFIG_ENABLE_FREERTOS=y
CONFIG_ENABLE_RTOS_DUMP_PRINT=y
CONFIG_DUMP_PRINT_SZ_IDX=17
CONFIG_SENSOR_LONTIUM_LT6911=y
build/boards/cv180x/cv1800b_wevb_0008a_spinor/dts_riscv/cv1800b_wevb_0008a_spinor.dts
View file @ 694372a5
......@@ -4,10 +4,6 @@
#include "cv180x_asic_spinor.dtsi"
#include "cv180x_default_memmap.dtsi"
&i2c2 {
status = "disabled";
};
/ {
};
......
build/boards/cv180x/cv1800b_wevb_0008a_spinor/linux/cvitek_cv1800b_wevb_0008a_spinor_defconfig
View file @ 694372a5
......@@ -155,9 +155,12 @@ CONFIG_SND_SOC_CV182XAADC=y
CONFIG_SND_SOC_CV182XADAC=y
CONFIG_SND_SOC_CV1835_USE_AUDIO_PLL=y
CONFIG_CV1835_I2S_SUBSYS=y
CONFIG_SND_SOC_CV1835_LT9611=y
CONFIG_SND_SOC_CV183x_DUMMY_CARD=y
CONFIG_USB=y
CONFIG_USB_DWC2=y
CONFIG_USB_GADGET=y
CONFIG_USB_ROLE_SWITCH=y
CONFIG_USB_CONFIGFS=y
CONFIG_USB_CONFIGFS_SERIAL=y
CONFIG_USB_CONFIGFS_ACM=y
......@@ -211,3 +214,6 @@ CONFIG_DEBUG_FS=y
# CONFIG_RCU_TRACE is not set
# CONFIG_FTRACE is not set
# CONFIG_RUNTIME_TESTING_MENU is not set
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_USB_STORAGE=y
build/boards/cv180x/cv180zb_wevb_0008a_spinor/cv180zb_wevb_0008a_spinor_defconfig
View file @ 694372a5
......@@ -32,6 +32,7 @@ CONFIG_TARGET_PACKAGE_CRONTABS=y
CONFIG_TARGET_PACKAGE_WIFI=y
CONFIG_TARGET_PACKAGE_DROPBEAR=y
CONFIG_TARGET_PACKAGE_NTP=y
CONFIG_ENABLE_FREERTOS=y
CONFIG_ENABLE_RTOS_DUMP_PRINT=y
CONFIG_DUMP_PRINT_SZ_IDX=17
CONFIG_USE_4K_ERASE_SIZE_FOR_JFFS2=y
......
build/boards/cv181x/cv1811c_wevb_0006a_spinand/u-boot/cvitek_cv1811c_wevb_0006a_spinand_rls_defconfig
View file @ 694372a5
......@@ -6,58 +6,25 @@ CONFIG_IDENT_STRING=" cvitek_cv181x"
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_TARGET_CVITEK_CV181X=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
# CONFIG_FIT_PRINT is not set
# CONFIG_LEGACY_IMAGE_FORMAT is not set
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOOTDELAY=0
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="run distro_bootcmd"
CONFIG_HUSH_PARSER=y
# CONFIG_CMDLINE_EDITING is not set
# CONFIG_AUTO_COMPLETE is not set
# CONFIG_SYS_LONGHELP is not set
CONFIG_SYS_PROMPT="cv181x_c906# "
# CONFIG_SYS_XTRACE is not set
# CONFIG_CMD_BDI is not set
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_CPU is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_BOOTI is not set
# CONFIG_BOOTM_NETBSD is not set
CONFIG_BOOTM_OPENRTOS=y
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_BOOTM_VXWORKS is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_FDT is not set
# CONFIG_CMD_GO is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_SAVEENV is not set
# CONFIG_CMD_ENV_EXISTS is not set
# CONFIG_CMD_CRC32 is not set
# CONFIG_CMD_MEMORY is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LZMADEC is not set
# CONFIG_CMD_UNLZ4 is not set
# CONFIG_CMD_UNZIP is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
# CONFIG_CMD_ECHO is not set
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SOURCE is not set
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_BOOTP is not set
# CONFIG_CMD_TFTPBOOT is not set
# CONFIG_CMD_NFS is not set
# CONFIG_CMD_BLOCK_CACHE is not set
# CONFIG_CMD_SLEEP is not set
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
# CONFIG_ENV_IS_IN_SPI_FLASH is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_CVI_SD_UPDATE=y
# CONFIG_ISO_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
......@@ -65,17 +32,13 @@ CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_CVITEK=y
CONFIG_MTD=y
# CONFIG_SPI_FLASH is not set
# CONFIG_PHY_SMSC is not set
CONFIG_PHY_CVITEK=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_FAT_WRITE=y
# CONFIG_REGEX is not set
CONFIG_LZ4=y
CONFIG_LZMA=y
# CONFIG_GZIP is not set
# CONFIG_EFI_LOADER is not set
# CONFIG_TOOLS_LIBCRYPTO is not set
CONFIG_MTD_RAW_NAND=y
CONFIG_NAND_FLASH_CVSNFC_V3=y
......
build/boards/cv181x/cv1812cp_wevb_0006a_emmc/config.json 0 → 100644
View file @ 694372a5
{
"ddr_cfg_list": [
"",
"ddr3_1866_x16",
"ddr3_2133_x16",
"ddr_auto_x16"
],
"board_information": "C906B + EMMC 8192MB + BGA SIP 256MB"
}
build/boards/cv181x/cv1812cp_wevb_0006a_emmc/cv1812cp_wevb_0006a_emmc_defconfig 0 → 100644
View file @ 694372a5
CONFIG_CHIP_cv1812cp=y
CONFIG_BOARD_wevb_0006a_emmc=y
CONFIG_DDR_CFG_ddr3_1866_x16=y
CONFIG_ARCH="riscv"
CONFIG_CROSS_COMPILE="riscv64-unknown-linux-gnu-"
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_KERNEL_ENTRY_HACK=y
CONFIG_KERNEL_ENTRY_HACK_ADDR="0x80200000"
CONFIG_TOOLCHAIN_MUSL_RISCV64=y
CONFIG_FLASH_SIZE_SHRINK=y
CONFIG_BOOT_IMAGE_SINGLE_DTB=y
CONFIG_STORAGE_TYPE_emmc=y
CONFIG_SENSOR_GCORE_GC4653=y
CONFIG_SENSOR_SMS_SC3335=y
CONFIG_SENSOR_SMS_SC500AI=y
CONFIG_SENSOR_SONY_IMX307=y
CONFIG_SENSOR_SONY_IMX307_2L=y
CONFIG_SENSOR_SONY_IMX307_SLAVE=y
CONFIG_SENSOR_SONY_IMX327=y
CONFIG_SENSOR_SONY_IMX327_2L=y
CONFIG_SENSOR_SONY_IMX327_SLAVE=y
CONFIG_SENSOR_OV_OS04C10=y
CONFIG_SENSOR_OV_OS04A10=y
CONFIG_UBOOT_2021_10=y
CONFIG_KERNEL_SRC_5.10=y
CONFIG_KERNEL_LZMA=y
CONFIG_SKIP_RAMDISK=y
CONFIG_SENSOR_TUNING_PARAM_cv181x_src_gcore_gc4653=y
# CONFIG_ROOTFS_OVERLAYFS is not set
CONFIG_TARGET_PACKAGE_DROPBEAR=y
CONFIG_TARGET_PACKAGE_MTD-UTILS=y
# CONFIG_TARGET_PACKAGE_RSYSLOG is not set
CONFIG_TARGET_PACKAGE_BUSYBOX_SYSLOGD_SCRIPT=y
CONFIG_ENABLE_FREERTOS=y
CONFIG_ENABLE_RTOS_DUMP_PRINT=y
CONFIG_DUMP_PRINT_SZ_IDX=17
CONFIG_TARGET_PACKAGE_GATORD=n
CONFIG_TARGET_PACKAGE_NTP=y
CONFIG_TARGET_PACKAGE_WIFI=y
build/boards/cv181x/cv1812cp_wevb_0006a_emmc/dts_riscv/cv1812cp_wevb_0006a_emmc.dts 0 → 100644
View file @ 694372a5
/dts-v1/;
#include "cv181x_base_riscv.dtsi"
#include "cv181x_asic_qfn.dtsi"
#include "cv181x_asic_emmc.dtsi"
#include "cv181x_default_memmap.dtsi"
/ {
};
&emmc {
no-1-8-v;
};
build/boards/cv181x/cv1812cp_wevb_0006a_emmc/memmap.py 0 → 100755
View file @ 694372a5
SIZE_1M = 0x100000
SIZE_1K = 1024
# Only attributes in class MemoryMap are generated to .h
class MemoryMap:
# No prefix "CVIMMAP_" for the items in _no_prefix[]
_no_prefix = [
"CONFIG_SYS_TEXT_BASE" # u-boot's CONFIG_SYS_TEXT_BASE is used without CPP.
]
DRAM_BASE = 0x80000000
DRAM_SIZE = 256 * SIZE_1M
# ==============
# C906L FreeRTOS
# ==============
FREERTOS_SIZE = 2 * SIZE_1M
# FreeRTOS is at the end of DRAM
FREERTOS_ADDR = DRAM_BASE + DRAM_SIZE - FREERTOS_SIZE
FSBL_C906L_START_ADDR = FREERTOS_ADDR
# ==============================
# OpenSBI | arm-trusted-firmware
# ==============================
# Monitor is at the begining of DRAM
MONITOR_ADDR = DRAM_BASE
ATF_SIZE = 512 * SIZE_1K
OPENSBI_SIZE = 512 * SIZE_1K
OPENSBI_FDT_ADDR = MONITOR_ADDR + OPENSBI_SIZE
# =========================
# memory@DRAM_BASE in .dts.
# =========================
# Ignore the area of FreeRTOS in u-boot and kernel
KERNEL_MEMORY_ADDR = DRAM_BASE
KERNEL_MEMORY_SIZE = DRAM_SIZE - FREERTOS_SIZE
# =================
# Multimedia buffer. Used by u-boot/kernel/FreeRTOS
# =================
ION_SIZE = 75 * SIZE_1M
H26X_BITSTREAM_SIZE = 2 * SIZE_1M
H26X_ENC_BUFF_SIZE = 0
ISP_MEM_BASE_SIZE = 20 * SIZE_1M
FREERTOS_RESERVED_ION_SIZE = H26X_BITSTREAM_SIZE + H26X_ENC_BUFF_SIZE + ISP_MEM_BASE_SIZE
# ION after FreeRTOS
ION_ADDR = FREERTOS_ADDR - ION_SIZE
# Buffers of the fast image are inside the ION buffer
H26X_BITSTREAM_ADDR = ION_ADDR
H26X_ENC_BUFF_ADDR = H26X_BITSTREAM_ADDR + H26X_BITSTREAM_SIZE
ISP_MEM_BASE_ADDR = H26X_ENC_BUFF_ADDR + H26X_ENC_BUFF_SIZE
assert ISP_MEM_BASE_ADDR + ISP_MEM_BASE_SIZE <= ION_ADDR + ION_SIZE
# Boot logo is after the ION buffer
# Framebuffer uses boot logo's reserved memory
BOOTLOGO_SIZE = 1800 * SIZE_1K
BOOTLOGO_ADDR = ION_ADDR - BOOTLOGO_SIZE
FRAMEBUFFER_SIZE = BOOTLOGO_SIZE
FRAMEBUFFER_ADDR = BOOTLOGO_ADDR
# ===================
# FSBL and u-boot-2021
# ===================
CVI_UPDATE_HEADER_SIZE = SIZE_1K
UIMAG_SIZE = 16 * SIZE_1M
# kernel image loading buffer
UIMAG_ADDR = DRAM_BASE + 24 * SIZE_1M
CVI_UPDATE_HEADER_ADDR = UIMAG_ADDR - CVI_UPDATE_HEADER_SIZE
# FSBL decompress buffer
FSBL_UNZIP_ADDR = UIMAG_ADDR
FSBL_UNZIP_SIZE = UIMAG_SIZE
assert UIMAG_ADDR + UIMAG_SIZE <= BOOTLOGO_ADDR
# u-boot's run address and entry point
CONFIG_SYS_TEXT_BASE = DRAM_BASE + 2 * SIZE_1M
# u-boot's init stack point is only used before board_init_f()
CONFIG_SYS_INIT_SP_ADDR = UIMAG_ADDR + UIMAG_SIZE
build/boards/cv181x/cv1812cp_wevb_0006a_emmc/partition/partition_emmc.xml 0 → 100644
View file @ 694372a5
<physical_partition type="emmc">
<partition label="BOOT" size_in_kb="8192" file="boot.emmc" />
<partition label="MISC" size_in_kb="512" file="logo.jpg" />
<!-- Beware that in emmc u-boot environment should be 0x40000 alignment -->
<partition label="ENV" size_in_kb="128" file="" />
<partition label="ROOTFS" size_in_kb="70656" file="rootfs.emmc" />
<partition label="SYSTEM" size_in_kb="40960" file="system.emmc" type="ext4" />
<partition label="CFG" size_in_kb="15240" file="cfg.emmc" mountpoint="/mnt/cfg" type="ext4" />
<partition label="DATA" size_in_kb="3145728" file="" mountpoint="/mnt/data" type="ext4"/>
</physical_partition>
build/boards/cv181x/cv1812cp_wevb_0006a_emmc/rootfs_script/clean_rootfs.sh 0 → 100755
View file @ 694372a5
#!/bin/bash
SYSTEM_DIR=$1
rm -f $SYSTEM_DIR/mnt/system/usr/lib/libz*
rm -f $SYSTEM_DIR/mnt/system/lib/libz*
rm -f $SYSTEM_DIR/mnt/system/usr/lib/3rd/libcvi*
rm -f $SYSTEM_DIR/mnt/system/usr/lib/3rd/libmad*
rm -f $SYSTEM_DIR/mnt/system/usr/lib/3rd/libmp3*
rm -f $SYSTEM_DIR/mnt/system/usr/lib/3rd/libopencv*
rm -f $SYSTEM_DIR/mnt/system/usr/lib/libopencv*
rm -f $SYSTEM_DIR/mnt/system/usr/lib/libcvi_rtsp.so
rm -f $SYSTEM_DIR/mnt/system/data/install/lib/libcvi_rtsp.so
rm -f $SYSTEM_DIR/mnt/system/usr/lib/libcvikernel.so
rm -f $SYSTEM_DIR/mnt/system/usr/lib/*.a
rm -f $SYSTEM_DIR/mnt/system/usr/lib/libgst*
rm -f $SYSTEM_DIR/mnt/system/usr/lib/libg*
rm -f $SYSTEM_DIR/mnt/system/usr/lib/gstreamer-1.0/libgst*
rm -f $SYSTEM_DIR/mnt/system/data/install/lib/libcrypto.so*
rm -f $SYSTEM_DIR/mnt/system/data/install/lib/libssl.so*
rm -f $SYSTEM_DIR/mnt/system/data/install/lib/libcvi_protobuf.so*
rm -f $SYSTEM_DIR/mnt/system/data/install/lib/libprotobuf-lite.so*
rm -f $SYSTEM_DIR/mnt/system/usr/lib/libcviai*
rm -f $SYSTEM_DIR/mnt/system/usr/lib/libcvi_ispd.so*
rm -f $SYSTEM_DIR/mnt/system/usr/lib/libraw_replay.so*
rm -f $SYSTEM_DIR/mnt/system/usr/lib/libcvi_ive_tpu.so*
rm -rf $SYSTEM_DIR/mnt/system/usr/lib/gio
rm -rf $SYSTEM_DIR/mnt/system/usr/lib/glib*
rm -rf $SYSTEM_DIR/mnt/system/usr/lib/gstreamer-1.0*
rm -rf $SYSTEM_DIR/mnt/system/usr/libexec*
rm -rf $SYSTEM_DIR/mnt/system/usr/bin
rm -f $SYSTEM_DIR/mnt/system/usr/lib/libcvimath.so
rm -f $SYSTEM_DIR/mnt/system/usr/lib/libcviruntime.so
rm -f $SYSTEM_DIR/mnt/system/usr/lib/libcnpy.so
rm -f $SYSTEM_DIR/mnt/system/usr/lib/libcipher.so
rm -f $SYSTEM_DIR/mnt/system/lib/libcipher.so*
rm -f $SYSTEM_DIR/mnt/system/lib/libcvi_ispd.so*
rm -f $SYSTEM_DIR/mnt/system/lib/libraw_replay.so*
rm -f $SYSTEM_DIR/mnt/system/lib/libmad.so*
rm -f $SYSTEM_DIR/mnt/system/lib/libmp3*
rm -f $SYSTEM_DIR/mnt/system/lib/libnanomsg*
#del 3rdparty lib
#del thttpd/libwebsockets lib
rm -f $SYSTEM_DIR/mnt/system/lib/libthttpd*
rm -f $SYSTEM_DIR/mnt/system/lib/libwebsocket*
if [ $SDK_VER = "uclibc" ]
then
#del opencv lib
rm -f $SYSTEM_DIR/mnt/system/lib/libopencv*
#del ffmpeg lib
rm -f $SYSTEM_DIR/mnt/system/lib/libav*
#save /mnt/system/lib/ openssl lib; need by ntpdate/wpa_supplicant
else
#glibc ramdisk(rootfs/common_arm/usr/lib/) has libcrypto.so and libssl.so
#del openssl
rm -f $SYSTEM_DIR/mnt/system/lib/libssl*
rm -f $SYSTEM_DIR/mnt/system/lib/libcrypto*
fi
rm -rf $SYSTEM_DIR/etc/init.d/S23ntp
rm -rf $SYSTEM_DIR/bin/ntpd
du -sh $SYSTEM_DIR/* |sort -rh
du -sh $SYSTEM_DIR/mnt/* |sort -rh
du -sh $SYSTEM_DIR/mnt/system/* |sort -rh
du -sh $SYSTEM_DIR/mnt/system/lib/* |sort -rh
du -sh $SYSTEM_DIR/mnt/system/data/install/* |sort -rh
du -sh $SYSTEM_DIR/usr/* |sort -rh
build/boards/cv181x/cv1812cp_wevb_0006a_emmc/u-boot/cvi_board_init.c 0 → 100644
View file @ 694372a5
int cvi_board_init(void)
{
PINMUX_CONFIG(PAD_MIPI_TXM1, IIC2_SDA);
PINMUX_CONFIG(PAD_MIPI_TXP1, IIC2_SCL);
PINMUX_CONFIG(PAD_MIPI_TXM0, CAM_MCLK1);
return 0;
}
build/boards/cv181x/cv1812cp_wevb_0006a_emmc/u-boot/cvitek.h 0 → 100644
View file @ 694372a5
/*
*VO control GPIOs
*/
#define VO_GPIO_RESET_PORT portb
#define VO_GPIO_RESET_INDEX 5
#define VO_GPIO_RESET_ACTIVE GPIO_ACTIVE_LOW
#define VO_GPIO_PWM_PORT portb
#define VO_GPIO_PWM_INDEX 4
#define VO_GPIO_PWM_ACTIVE GPIO_ACTIVE_HIGH
#define VO_GPIO_POWER_CT_PORT portb
#define VO_GPIO_POWER_CT_INDEX 3
#define VO_GPIO_POWER_CT_ACTIVE GPIO_ACTIVE_HIGH
build/boards/cv181x/cv1812cp_wevb_0006a_emmc/u-boot/cvitek_cv1812cp_wevb_0006a_emmc_defconfig 0 → 100644
View file @ 694372a5
CONFIG_RISCV=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEFAULT_DEVICE_TREE="cv181x_asic"
CONFIG_IDENT_STRING=" cvitek_cv181x"
CONFIG_ARCH_RV64I=y
CONFIG_RISCV_SMODE=y
CONFIG_TARGET_CVITEK_CV181X=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOOTDELAY=1
CONFIG_SYS_PROMPT="cv181x_c906# "
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_EDITENV is not set
# CONFIG_CMD_CRC32 is not set
# CONFIG_CMD_LZMADEC is not set
# CONFIG_CMD_UNLZ4 is not set
# CONFIG_CMD_UNZIP is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_ITEST is not set
CONFIG_CMD_CACHE=y
CONFIG_CMD_CVI_SD_UPDATE=y
# CONFIG_ISO_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_CVITEK=y
CONFIG_MTD=y
# CONFIG_PHY_SMSC is not set
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PHY_CVITEK=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_LZ4=y
CONFIG_LZMA=y
# CONFIG_TOOLS_LIBCRYPTO is not set
CONFIG_ENV_IS_IN_MMC=y
build/boards/cv182x/cv1820_wevb_0005b_kl510_spinor/linux/cv1820_wevb_0005b_kl510_spinor_ddr.dtsi
View file @ 694372a5
/ {
memory {
reg = <0x0 0x80000000 0x0 0x4000000>; // 512MB
device_type = "memory";
};
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x1000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x1C00000>; //28MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00200000>; // 1.5MB
no-map;
};
};
};
/ {
memory {
reg = <0x0 0x80000000 0x0 0x4000000>; // 512MB
device_type = "memory";
};
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x1000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x1C00000>; //28MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00200000>; // 1.5MB
no-map;
};
};
};
build/boards/cv182x/cv1820_wevb_0005b_spinand/linux/cv1820_wevb_0005b_spinand_ddr.dtsi
View file @ 694372a5
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x00400000>;
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
};
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x00400000>;
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
};
build/boards/cv182x/cv1820_wevb_0005b_spinor/linux/cv1820_wevb_0005b_spinor_ddr.dtsi
View file @ 694372a5
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x1700000>; //23MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
};
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x1700000>; //23MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
};
build/boards/cv182x/cv1821_wevb_0005b_64mb_spinor/linux/cv1821_wevb_0005b_64mb_spinor_ddr.dtsi
View file @ 694372a5
/ {
memory {
reg = <0x0 0x80000000 0x0 0x8000000>; // 128MB
device_type = "memory";
};
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x01C80000>; // 28.5MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
};
/ {
memory {
reg = <0x0 0x80000000 0x0 0x8000000>; // 128MB
device_type = "memory";
};
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x01C80000>; // 28.5MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
};
build/boards/cv182x/cv1821_wevb_0005b_spinand/linux/cv1821_wevb_0005b_spinand_ddr.dtsi
View file @ 694372a5
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x03C00000>; // 60MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x03C00000>; // 60MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
};
\ No newline at end of file
build/boards/cv182x/cv1821_wevb_0005b_spinor/linux/cv1821_wevb_0005b_spinor_ddr.dtsi
View file @ 694372a5
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x04780000>; // 71MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
sd:cv-sd@4310000 {
no-1-8-v;
};
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x04780000>; // 71MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
sd:cv-sd@4310000 {
no-1-8-v;
};
};
\ No newline at end of file
build/boards/cv182x/cv1822_wevb_0005b_128mb_spinand/linux/cv1822_wevb_0005b_128mb_spinand_ddr.dtsi
View file @ 694372a5
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x04180000>; // 65MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x04180000>; // 65MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
};
\ No newline at end of file
build/boards/cv182x/cv1822_wevb_0005b_64mb_spinand/linux/cv1822_wevb_0005b_64mb_spinand_ddr.dtsi
View file @ 694372a5
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x01672000>; // 22MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x000C0000>; // 768KB
no-map;
};
};
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x01672000>; // 22MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x000C0000>; // 768KB
no-map;
};
};
};
\ No newline at end of file
build/boards/cv182x/cv1822_wevb_0005b_spinand/linux/cv1822_wevb_0005b_spinand_ddr.dtsi
View file @ 694372a5
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x09000000>; // 144MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x09000000>; // 144MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
};
\ No newline at end of file
build/boards/cv182x/cv1822_wevb_0005b_spinor/linux/cv1822_wevb_0005b_spinor_ddr.dtsi
View file @ 694372a5
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x04180000>; // 65MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x04180000>; // 65MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
};
\ No newline at end of file
build/boards/cv182x/cv1823_wevb_0005a/linux/cv1823_wevb_0005a_ddr.dtsi
View file @ 694372a5
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x04872000>; // 72MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x04872000>; // 72MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
};
\ No newline at end of file
build/boards/cv182x/cv1823_wevb_0005a_spinand/linux/cv1823_wevb_0005a_spinand_ddr.dtsi
View file @ 694372a5
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x04872000>; // 72MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x04872000>; // 72MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
};
\ No newline at end of file
build/boards/cv182x/cv1823_wevb_0005a_spinor/linux/cv1823_wevb_0005a_spinor_ddr.dtsi
View file @ 694372a5
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x04180000>; // 65MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x04180000>; // 65MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
};
\ No newline at end of file
build/boards/cv182x/cv1825_wevb_0005a/linux/cv1825_wevb_0005a_ddr.dtsi
View file @ 694372a5
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x0AC00000>; // 172MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x0AC00000>; // 172MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
};
\ No newline at end of file
build/boards/cv182x/cv1825_wevb_0005a_spinand/linux/cv1825_wevb_0005a_spinand_ddr.dtsi
View file @ 694372a5
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x0AC00000>; // 172MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x0AC00000>; // 172MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
};
\ No newline at end of file
build/boards/cv182x/cv1826_wevb_0005a/linux/cv1826_wevb_0005a_ddr.dtsi
View file @ 694372a5
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x0AC00000>; // 172MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x0AC00000>; // 172MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
};
\ No newline at end of file
build/boards/cv182x/cv1826_wevb_0005a_128mb_spinand/linux/cv1826_wevb_0005a_128mb_spinand_ddr.dtsi
View file @ 694372a5
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x04872000>; // 72MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x04872000>; // 72MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
};
\ No newline at end of file
build/boards/cv182x/cv1826_wevb_0005a_spinand/linux/cv1826_wevb_0005a_spinand_ddr.dtsi
View file @ 694372a5
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x0C000000>; // 192MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x0C000000>; // 192MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
};
\ No newline at end of file
build/boards/cv182x/cv1826_wevb_0005a_spinor/linux/cv1826_wevb_0005a_spinor_ddr.dtsi
View file @ 694372a5
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x09000000>; // 144MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
/ {
reserved-memory {
#size-cells = <0x2>;
#address-cells = <0x2>;
ranges;
cma_reserved: linux,cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x200000>; // 2MB
alignment = <0x0 0x200000>; // 2MB
linux,cma-default;
};
ion_reserved: ion {
compatible = "ion-region";
size = <0x0 0x09000000>; // 144MB
};
vcodec_reserved: vcodec {
alloc-ranges = <0x0 0x80000000 0 0xC0000000>;
size = <0x0 0x00180000>; // 1.5MB
no-map;
};
};
};
\ No newline at end of file
build/boards/default/dts/cv180x/cv180x_asic_qfn.dtsi
View file @ 694372a5
......@@ -53,7 +53,6 @@
/ {
/delete-node/ wifi-sd@4320000;
/delete-node/ i2s@04110000;
/delete-node/ i2s@04120000;
/delete-node/ sound_ext1;
/delete-node/ sound_ext2;
/delete-node/ sound_PDM;
......
build/boards/default/dts/cv180x/cv180x_base.dtsi
View file @ 694372a5
......@@ -643,6 +643,13 @@
cvi,model = "CV182X";
cvi,card_name = "cv182x_internal_PDM";
};
lt9611 {
compatible = "cvitek,cv1835-lt9611";
cvi,model = "CV182X";
cvi,card_name = "cv181x_lt9611";
cvi,cpu_dai_name = "4120000.i2s";
cvi,platform_name = "4120000.i2s";
};
wifi_pin {
compatible = "cvitek,wifi-pin";
......
build/boards/default/u-boot/cv180x_qfn_cvi_board_init.c
View file @ 694372a5
......@@ -20,14 +20,22 @@ int cvi_board_init(void)
//PINMUX_CONFIG(SD1_D3, PWR_GPIO18);
#elif defined(CV180X_QFN_68_PIN)
PINMUX_CONFIG(PAD_MIPIRX1P, IIC1_SDA);
PINMUX_CONFIG(PAD_MIPIRX0N, IIC1_SCL);
PINMUX_CONFIG(PAD_MIPIRX1N, XGPIOC_8);
PINMUX_CONFIG(PAD_MIPIRX0P, CAM_MCLK0);
// PINMUX_CONFIG(PAD_MIPIRX1P, IIC1_SDA);
// PINMUX_CONFIG(PAD_MIPIRX0N, IIC1_SCL);
// PINMUX_CONFIG(PAD_MIPIRX1N, XGPIOC_8);
// PINMUX_CONFIG(PAD_MIPIRX0P, CAM_MCLK0);
//IRCUT
//PINMUX_CONFIG(SD1_D2, PWR_GPIO19);
//PINMUX_CONFIG(SD1_D3, PWR_GPIO18);
#endif
PINMUX_CONFIG(PAD_MIPIRX4N, XGPIOC_2);
PINMUX_CONFIG(PAD_MIPIRX4P, XGPIOC_3);
PINMUX_CONFIG(SD1_D0, PWR_GPIO_21);
PINMUX_CONFIG(SD1_CMD, IIC3_SCL);
PINMUX_CONFIG(SD1_CLK, IIC3_SDA);
PINMUX_CONFIG(PAD_ETH_TXP, IIS2_LRCK);
PINMUX_CONFIG(PAD_ETH_TXM, IIS2_BCLK);
PINMUX_CONFIG(PAD_ETH_RXM, IIS2_DI);
return 0;
}
build/common_functions.sh
View file @ 694372a5
......@@ -246,9 +246,7 @@ function pack_upgrade
function pack_sd_image
{(
pushd "$BUILD_PATH"
make sd_image || return "$?"
popd
"$COMMON_TOOLS_PATH"/sd_tools/sd_gen_burn_image.sh "$OUTPUT_DIR"
)}
function pack_prog_img
......
build/cvisetup.sh
View file @ 694372a5
......@@ -250,7 +250,9 @@ function build_middleware()
if [ -d $(echo ${CHIP_ARCH} | tr A-Z a-z)/ko ];
then
rm -rf ko
rm -rf ko_shrink
ln -s $(echo ${CHIP_ARCH} | tr A-Z a-z)/ko ko
ln -s $(echo ${CHIP_ARCH} | tr A-Z a-z)/ko_shrink ko_shrink
fi
popd
......@@ -515,15 +517,6 @@ function cvi_setup_env()
return 1
fi
fi
export SYSTEM_OUT_DIR
export CROSS_COMPILE_PATH
# buildroot config
export BR_DIR="$TOP_DIR"/buildroot-2021.05
export BR_BOARD=cvitek_${CHIP_ARCH}_${SDK_VER}
export BR_OVERLAY_DIR=${BR_DIR}/board/cvitek/${CHIP_ARCH}/overlay
export BR_DEFCONFIG=${BR_BOARD}_defconfig
export BR_ROOTFS_DIR="$OUTPUT_DIR"/tmp-rootfs
}
cvi_print_env()
......
build/sensors/sensor_list.json
View file @ 694372a5
{
"sensor_list": [
"BRIGATES_BG0808",
"CVSENS_CV4001",
"GCORE_GC02M1",
"GCORE_GC0312",
"GCORE_GC0329",
"GCORE_GC1054",
"GCORE_GC1084",
"GCORE_GC1084_SLAVE",
"GCORE_GC2053",
"GCORE_GC2053_1L",
"GCORE_GC2053_SLAVE",
......@@ -15,6 +18,7 @@
"GCORE_GC4653",
"GCORE_GC4653_SLAVE",
"IMGDS_MIS2008",
"IMGDS_MIS2008_1L",
"NEXTCHIP_N5",
"NEXTCHIP_N6",
"OV_OS02D10",
......@@ -51,6 +55,7 @@
"SMS_SC2331_1L",
"SMS_SC2335",
"SMS_SC2336",
"SMS_SC2336_1L",
"SMS_SC2336P",
"SMS_SC4210",
"SMS_SC4336",
......
build/tools/common/sd_tools/sd_gen_burn_image.sh
View file @ 694372a5
......@@ -66,7 +66,7 @@ sudo mount -t ext4 ${dev_name}p2 tmp2/
# copy boot file and rootfs
sudo cp ${output_dir}/fip.bin ./tmp1/
sudo cp ${output_dir}/rawimages/boot.sd ./tmp1/
sudo cp -raf ${output_dir}/fs/* ./tmp2
sudo cp -raf ${output_dir}/rootfs/* ./tmp2
sync
......
build/tools/cv181x/cmm/asic/arm_ca53/cv181x_core_reset.cmm
View file @ 694372a5
rsystem.attach
VectorCatch.RESET ON
go
break
WAIT !ISRUN() ;wait until target stop
IF ISCONNECT()
PRINT "Connect to target"
break
ELSE
dialog.ok "Not connect"
; Clear ATF multicore mailbox region
; entry, core[0, 1] state
; Data.Set PM:0xe00f000 %quad 0
; Data.Set PM:0xe00f008 %quad 0
; Data.Set PM:0xe00f010 %quad 0
; Data.Set PM:0xe00f018 %quad 0
; Data.Set PM:0xe00f020 %quad 0
; Reset core0
Data.Set EAXI:0x3000008 %long 0x00000004
Data.Set EAPB:0x81010fb0 %long 0xc5acce55
Data.Set EAPB:0x81010300 %long 0x00000000
Data.Set EAPB:0x81010024 %long 0x00000002
Data.Set EAPB:0x81010310 %long 0x00000002
; Reset core1
; Data.Set EAPB:0x81110fb0 %long 0xc5acce55
; Data.Set EAPB:0x81110300 %long 0x00000000
; Data.Set EAPB:0x81110024 %long 0x00000002
; Data.Set EAPB:0x81110310 %long 0x00000002
PRINT "cv181x core reset complete"
rsystem.attach
VectorCatch.RESET ON
go
break
WAIT !ISRUN() ;wait until target stop
IF ISCONNECT()
PRINT "Connect to target"
break
ELSE
dialog.ok "Not connect"
; Clear ATF multicore mailbox region
; entry, core[0, 1] state
; Data.Set PM:0xe00f000 %quad 0
; Data.Set PM:0xe00f008 %quad 0
; Data.Set PM:0xe00f010 %quad 0
; Data.Set PM:0xe00f018 %quad 0
; Data.Set PM:0xe00f020 %quad 0
; Reset core0
Data.Set EAXI:0x3000008 %long 0x00000004
Data.Set EAPB:0x81010fb0 %long 0xc5acce55
Data.Set EAPB:0x81010300 %long 0x00000000
Data.Set EAPB:0x81010024 %long 0x00000002
Data.Set EAPB:0x81010310 %long 0x00000002
; Reset core1
; Data.Set EAPB:0x81110fb0 %long 0xc5acce55
; Data.Set EAPB:0x81110300 %long 0x00000000
; Data.Set EAPB:0x81110024 %long 0x00000002
; Data.Set EAPB:0x81110310 %long 0x00000002
PRINT "cv181x core reset complete"
build/tools/cv181x/cmm/fpga/arm_ca53/cv181x_clear.cmm
View file @ 694372a5
sys.up
; Reset
break;
WAIT !ISRUN() ;wait until target stop
; MWriteS32 PM:0x0C000000++0x3ffff 0x14000000
MWriteS32 PM:0x4400000++0xf 0x14000000
MWriteS32 0x4400000++0xf 0x14000000
Register.Set pc 0x04400000
; MWriteS32 PM:0x03000008 0x4 // wdt reset enable
; MWriteS32 PM:0x03010004 0x1 // Set timeout range reigster
; MWriteS32 PM:0x0301000c 0x76 // Counter restart register
; MWriteS32 PM:0x03010000 0x13
print "CLEAR"
sys.up
; Reset
break;
WAIT !ISRUN() ;wait until target stop
; MWriteS32 PM:0x0C000000++0x3ffff 0x14000000
MWriteS32 PM:0x4400000++0xf 0x14000000
MWriteS32 0x4400000++0xf 0x14000000
Register.Set pc 0x04400000
; MWriteS32 PM:0x03000008 0x4 // wdt reset enable
; MWriteS32 PM:0x03010004 0x1 // Set timeout range reigster
; MWriteS32 PM:0x0301000c 0x76 // Counter restart register
; MWriteS32 PM:0x03010000 0x13
print "CLEAR"
build/tools/cv181x/cmm/fpga/arm_ca53/cv181x_core_reset.cmm
View file @ 694372a5
rsystem.attach
VectorCatch.RESET ON
go
break
WAIT !ISRUN() ;wait until target stop
IF ISCONNECT()
PRINT "Connect to target"
break
ELSE
dialog.ok "Not connect"
; Clear ATF multicore mailbox region
; entry, core[0, 1] state
; Data.Set PM:0xe00f000 %quad 0
; Data.Set PM:0xe00f008 %quad 0
; Data.Set PM:0xe00f010 %quad 0
; Data.Set PM:0xe00f018 %quad 0
; Data.Set PM:0xe00f020 %quad 0
; Reset core0
Data.Set EAXI:0x3000008 %long 0x00000004
Data.Set EAPB:0x81010fb0 %long 0xc5acce55
Data.Set EAPB:0x81010300 %long 0x00000000
Data.Set EAPB:0x81010024 %long 0x00000002
Data.Set EAPB:0x81010310 %long 0x00000002
; Reset core1
; Data.Set EAPB:0x81110fb0 %long 0xc5acce55
; Data.Set EAPB:0x81110300 %long 0x00000000
; Data.Set EAPB:0x81110024 %long 0x00000002
; Data.Set EAPB:0x81110310 %long 0x00000002
PRINT "cv181x core reset complete"
rsystem.attach
VectorCatch.RESET ON
go
break
WAIT !ISRUN() ;wait until target stop
IF ISCONNECT()
PRINT "Connect to target"
break
ELSE
dialog.ok "Not connect"
; Clear ATF multicore mailbox region
; entry, core[0, 1] state
; Data.Set PM:0xe00f000 %quad 0
; Data.Set PM:0xe00f008 %quad 0
; Data.Set PM:0xe00f010 %quad 0
; Data.Set PM:0xe00f018 %quad 0
; Data.Set PM:0xe00f020 %quad 0
; Reset core0
Data.Set EAXI:0x3000008 %long 0x00000004
Data.Set EAPB:0x81010fb0 %long 0xc5acce55
Data.Set EAPB:0x81010300 %long 0x00000000
Data.Set EAPB:0x81010024 %long 0x00000002
Data.Set EAPB:0x81010310 %long 0x00000002
; Reset core1
; Data.Set EAPB:0x81110fb0 %long 0xc5acce55
; Data.Set EAPB:0x81110300 %long 0x00000000
; Data.Set EAPB:0x81110024 %long 0x00000002
; Data.Set EAPB:0x81110310 %long 0x00000002
PRINT "cv181x core reset complete"
build/tools/cv181x/cmm/fpga/arm_ca53/cv181x_fpga_prog_efuse.cmm
View file @ 694372a5
print "Program cv181x fpga efuse"
Data.Set PM:0x03050000 %long 0x10
; [Write scs_config]
; Data.Set PM:0x03050340 %long 0x00000044
; [Write FTSN1~4]
; uart2_rts
; Data.Set PM:0x03050208 %long 0x008F3164
; uart2_cts
; Data.Set PM:0x03050208 %long 0x00913364
; fastboot, check id pin
Data.Set PM:0x03050208 %long 0x00913361
Data.Set PM:0x03050210 %long 0x55667788
Data.Set PM:0x03050218 %long 0x44332211
Data.Set PM:0x03050220 %long 0x88776655
Data.Set PM:0x03050000 %long 0x30
print "Program cv181x fpga efuse done"
print "Program cv181x fpga efuse"
Data.Set PM:0x03050000 %long 0x10
; [Write scs_config]
; Data.Set PM:0x03050340 %long 0x00000044
; [Write FTSN1~4]
; uart2_rts
; Data.Set PM:0x03050208 %long 0x008F3164
; uart2_cts
; Data.Set PM:0x03050208 %long 0x00913364
; fastboot, check id pin
Data.Set PM:0x03050208 %long 0x00913361
Data.Set PM:0x03050210 %long 0x55667788
Data.Set PM:0x03050218 %long 0x44332211
Data.Set PM:0x03050220 %long 0x88776655
Data.Set PM:0x03050000 %long 0x30
print "Program cv181x fpga efuse done"
build/tools/cv181x/cmm/fpga/arm_ca53/cv181x_fpga_prog_usb_efuse.cmm
View file @ 694372a5
print "Program cv181x fpga efuse"
Data.Set PM:0x03050000 %long 0x10
; [Write userconf]
Data.Set PM:0x03050258 %long 0x0E000002
;Data.Set PM:0x03050260 %long 0x00123490
;Data.Set PM:0x03050260 %long 0x000000A0
Data.Set PM:0x03050000 %long 0x30
print "Program cv181x fpga efuse done"
print "Program cv181x fpga efuse"
Data.Set PM:0x03050000 %long 0x10
; [Write userconf]
Data.Set PM:0x03050258 %long 0x0E000002
;Data.Set PM:0x03050260 %long 0x00123490
;Data.Set PM:0x03050260 %long 0x000000A0
Data.Set PM:0x03050000 %long 0x30
print "Program cv181x fpga efuse done"
build/tools/cv181x/cmm/palladium/arm_ca53/cv181x_clear.cmm
View file @ 694372a5
sys.up
; Reset
break;
WAIT !ISRUN() ;wait until target stop
; MWriteS32 PM:0x0C000000++0x3ffff 0x14000000
MWriteS32 PM:0x4400000++0xf 0x14000000
MWriteS32 0x4400000++0xf 0x14000000
Register.Set pc 0x04400000
; MWriteS32 PM:0x03000008 0x4 // wdt reset enable
; MWriteS32 PM:0x03010004 0x1 // Set timeout range reigster
; MWriteS32 PM:0x0301000c 0x76 // Counter restart register
; MWriteS32 PM:0x03010000 0x13
print "CLEAR"
sys.up
; Reset
break;
WAIT !ISRUN() ;wait until target stop
; MWriteS32 PM:0x0C000000++0x3ffff 0x14000000
MWriteS32 PM:0x4400000++0xf 0x14000000
MWriteS32 0x4400000++0xf 0x14000000
Register.Set pc 0x04400000
; MWriteS32 PM:0x03000008 0x4 // wdt reset enable
; MWriteS32 PM:0x03010004 0x1 // Set timeout range reigster
; MWriteS32 PM:0x0301000c 0x76 // Counter restart register
; MWriteS32 PM:0x03010000 0x13
print "CLEAR"
build/tools/cv181x/cmm/palladium/arm_ca53/cv181x_core_reset.cmm
View file @ 694372a5
rsystem.attach
VectorCatch.RESET ON
go
break
WAIT !ISRUN() ;wait until target stop
IF ISCONNECT()
PRINT "Connect to target"
break
ELSE
dialog.ok "Not connect"
; Clear ATF multicore mailbox region
; entry, core[0, 1] state
; Data.Set PM:0xe00f000 %quad 0
; Data.Set PM:0xe00f008 %quad 0
; Data.Set PM:0xe00f010 %quad 0
; Data.Set PM:0xe00f018 %quad 0
; Data.Set PM:0xe00f020 %quad 0
; Reset core0
Data.Set EAXI:0x3000008 %long 0x00000004
Data.Set EAPB:0x81010fb0 %long 0xc5acce55
Data.Set EAPB:0x81010300 %long 0x00000000
Data.Set EAPB:0x81010024 %long 0x00000002
Data.Set EAPB:0x81010310 %long 0x00000002
; Reset core1
; Data.Set EAPB:0x81110fb0 %long 0xc5acce55
; Data.Set EAPB:0x81110300 %long 0x00000000
; Data.Set EAPB:0x81110024 %long 0x00000002
; Data.Set EAPB:0x81110310 %long 0x00000002
PRINT "cv181x core reset complete"
rsystem.attach
VectorCatch.RESET ON
go
break
WAIT !ISRUN() ;wait until target stop
IF ISCONNECT()
PRINT "Connect to target"
break
ELSE
dialog.ok "Not connect"
; Clear ATF multicore mailbox region
; entry, core[0, 1] state
; Data.Set PM:0xe00f000 %quad 0
; Data.Set PM:0xe00f008 %quad 0
; Data.Set PM:0xe00f010 %quad 0
; Data.Set PM:0xe00f018 %quad 0
; Data.Set PM:0xe00f020 %quad 0
; Reset core0
Data.Set EAXI:0x3000008 %long 0x00000004
Data.Set EAPB:0x81010fb0 %long 0xc5acce55
Data.Set EAPB:0x81010300 %long 0x00000000
Data.Set EAPB:0x81010024 %long 0x00000002
Data.Set EAPB:0x81010310 %long 0x00000002
; Reset core1
; Data.Set EAPB:0x81110fb0 %long 0xc5acce55
; Data.Set EAPB:0x81110300 %long 0x00000000
; Data.Set EAPB:0x81110024 %long 0x00000002
; Data.Set EAPB:0x81110310 %long 0x00000002
PRINT "cv181x core reset complete"
build/tools/cv181x/cmm/palladium/arm_ca53/cv181x_palladium_prog_efuse.cmm
View file @ 694372a5
print "Program cv181x palladium efuse"
Data.Set PM:0x03050000 %long 0x10
; [Write scs_config]
; Data.Set PM:0x03050340 %long 0x00000044
; [Write FTSN1~4]
; uart2_rts
; Data.Set PM:0x03050208 %long 0x008F3164
; uart2_cts
; Data.Set PM:0x03050208 %long 0x00913364
; fastboot, check id pin
Data.Set PM:0x03050208 %long 0x00913361
Data.Set PM:0x03050210 %long 0x55667788
Data.Set PM:0x03050218 %long 0x44332211
Data.Set PM:0x03050220 %long 0x88776655
Data.Set PM:0x03050000 %long 0x30
print "Program cv181x palladium efuse done"
print "Program cv181x palladium efuse"
Data.Set PM:0x03050000 %long 0x10
; [Write scs_config]
; Data.Set PM:0x03050340 %long 0x00000044
; [Write FTSN1~4]
; uart2_rts
; Data.Set PM:0x03050208 %long 0x008F3164
; uart2_cts
; Data.Set PM:0x03050208 %long 0x00913364
; fastboot, check id pin
Data.Set PM:0x03050208 %long 0x00913361
Data.Set PM:0x03050210 %long 0x55667788
Data.Set PM:0x03050218 %long 0x44332211
Data.Set PM:0x03050220 %long 0x88776655
Data.Set PM:0x03050000 %long 0x30
print "Program cv181x palladium efuse done"
build/tools/cv181x/cmm/palladium/arm_ca53/cv181x_palladium_prog_usb_efuse.cmm
View file @ 694372a5
print "Program cv181x palladium efuse"
Data.Set PM:0x03050000 %long 0x10
; [Write userconf]
Data.Set PM:0x03050258 %long 0x0E000002
;Data.Set PM:0x03050260 %long 0x00123490
;Data.Set PM:0x03050260 %long 0x000000A0
Data.Set PM:0x03050000 %long 0x30
print "Program cv181x palladium efuse done"
print "Program cv181x palladium efuse"
Data.Set PM:0x03050000 %long 0x10
; [Write userconf]
Data.Set PM:0x03050258 %long 0x0E000002
;Data.Set PM:0x03050260 %long 0x00123490
;Data.Set PM:0x03050260 %long 0x000000A0
Data.Set PM:0x03050000 %long 0x30
print "Program cv181x palladium efuse done"
build/tools/cv182x/cmm/asic/cv1822_core_reset.cmm
View file @ 694372a5
rsystem.attach
VectorCatch.RESET ON
go
break
WAIT !ISRUN() ;wait until target stop
IF ISCONNECT()
PRINT "Connect to target"
break
ELSE
dialog.ok "Not connect"
; Clear ATF multicore mailbox region
; entry, core[0, 1] state
; Data.Set PM:0xe00f000 %quad 0
; Data.Set PM:0xe00f008 %quad 0
; Data.Set PM:0xe00f010 %quad 0
; Data.Set PM:0xe00f018 %quad 0
; Data.Set PM:0xe00f020 %quad 0
; Reset core0
Data.Set EAXI:0x3000008 %long 0x00000004
Data.Set EAPB:0x81010fb0 %long 0xc5acce55
Data.Set EAPB:0x81010300 %long 0x00000000
Data.Set EAPB:0x81010024 %long 0x00000002
Data.Set EAPB:0x81010310 %long 0x00000002
; Reset core1
; Data.Set EAPB:0x81110fb0 %long 0xc5acce55
; Data.Set EAPB:0x81110300 %long 0x00000000
; Data.Set EAPB:0x81110024 %long 0x00000002
; Data.Set EAPB:0x81110310 %long 0x00000002
PRINT "cv1822 core reset complete"
rsystem.attach
VectorCatch.RESET ON
go
break
WAIT !ISRUN() ;wait until target stop
IF ISCONNECT()
PRINT "Connect to target"
break
ELSE
dialog.ok "Not connect"
; Clear ATF multicore mailbox region
; entry, core[0, 1] state
; Data.Set PM:0xe00f000 %quad 0
; Data.Set PM:0xe00f008 %quad 0
; Data.Set PM:0xe00f010 %quad 0
; Data.Set PM:0xe00f018 %quad 0
; Data.Set PM:0xe00f020 %quad 0
; Reset core0
Data.Set EAXI:0x3000008 %long 0x00000004
Data.Set EAPB:0x81010fb0 %long 0xc5acce55
Data.Set EAPB:0x81010300 %long 0x00000000
Data.Set EAPB:0x81010024 %long 0x00000002
Data.Set EAPB:0x81010310 %long 0x00000002
; Reset core1
; Data.Set EAPB:0x81110fb0 %long 0xc5acce55
; Data.Set EAPB:0x81110300 %long 0x00000000
; Data.Set EAPB:0x81110024 %long 0x00000002
; Data.Set EAPB:0x81110310 %long 0x00000002
PRINT "cv1822 core reset complete"
build/tools/cv182x/cmm/fpga/cv1822_clear.cmm
View file @ 694372a5
sys.up
; Reset
break;
WAIT !ISRUN() ;wait until target stop
; MWriteS32 PM:0x0C000000++0x3ffff 0x14000000
MWriteS32 PM:0x4400000++0xf 0x14000000
MWriteS32 0x4400000++0xf 0x14000000
Register.Set pc 0x04400000
; MWriteS32 PM:0x03000008 0x4 // wdt reset enable
; MWriteS32 PM:0x03010004 0x1 // Set timeout range reigster
; MWriteS32 PM:0x0301000c 0x76 // Counter restart register
; MWriteS32 PM:0x03010000 0x13
print "CLEAR"
sys.up
; Reset
break;
WAIT !ISRUN() ;wait until target stop
; MWriteS32 PM:0x0C000000++0x3ffff 0x14000000
MWriteS32 PM:0x4400000++0xf 0x14000000
MWriteS32 0x4400000++0xf 0x14000000
Register.Set pc 0x04400000
; MWriteS32 PM:0x03000008 0x4 // wdt reset enable
; MWriteS32 PM:0x03010004 0x1 // Set timeout range reigster
; MWriteS32 PM:0x0301000c 0x76 // Counter restart register
; MWriteS32 PM:0x03010000 0x13
print "CLEAR"
build/tools/cv182x/cmm/fpga/cv1822_core_reset.cmm
View file @ 694372a5
rsystem.attach
VectorCatch.RESET ON
go
break
WAIT !ISRUN() ;wait until target stop
IF ISCONNECT()
PRINT "Connect to target"
break
ELSE
dialog.ok "Not connect"
; Clear ATF multicore mailbox region
; entry, core[0, 1] state
; Data.Set PM:0xe00f000 %quad 0
; Data.Set PM:0xe00f008 %quad 0
; Data.Set PM:0xe00f010 %quad 0
; Data.Set PM:0xe00f018 %quad 0
; Data.Set PM:0xe00f020 %quad 0
; Reset core0
Data.Set EAXI:0x3000008 %long 0x00000004
Data.Set EAPB:0x81010fb0 %long 0xc5acce55
Data.Set EAPB:0x81010300 %long 0x00000000
Data.Set EAPB:0x81010024 %long 0x00000002
Data.Set EAPB:0x81010310 %long 0x00000002
; Reset core1
; Data.Set EAPB:0x81110fb0 %long 0xc5acce55
; Data.Set EAPB:0x81110300 %long 0x00000000
; Data.Set EAPB:0x81110024 %long 0x00000002
; Data.Set EAPB:0x81110310 %long 0x00000002
PRINT "cv1822 core reset complete"
rsystem.attach
VectorCatch.RESET ON
go
break
WAIT !ISRUN() ;wait until target stop
IF ISCONNECT()
PRINT "Connect to target"
break
ELSE
dialog.ok "Not connect"
; Clear ATF multicore mailbox region
; entry, core[0, 1] state
; Data.Set PM:0xe00f000 %quad 0
; Data.Set PM:0xe00f008 %quad 0
; Data.Set PM:0xe00f010 %quad 0
; Data.Set PM:0xe00f018 %quad 0
; Data.Set PM:0xe00f020 %quad 0
; Reset core0
Data.Set EAXI:0x3000008 %long 0x00000004
Data.Set EAPB:0x81010fb0 %long 0xc5acce55
Data.Set EAPB:0x81010300 %long 0x00000000
Data.Set EAPB:0x81010024 %long 0x00000002
Data.Set EAPB:0x81010310 %long 0x00000002
; Reset core1
; Data.Set EAPB:0x81110fb0 %long 0xc5acce55
; Data.Set EAPB:0x81110300 %long 0x00000000
; Data.Set EAPB:0x81110024 %long 0x00000002
; Data.Set EAPB:0x81110310 %long 0x00000002
PRINT "cv1822 core reset complete"
build/tools/cv182x/cmm/fpga/cv1822_fpga_prog_efuse.cmm
View file @ 694372a5
print "Program cv1822 fpga efuse"
Data.Set PM:0x03050000 %long 0x10
; [Write scs_config]
; Data.Set PM:0x03050340 %long 0x00000044
; [Write FTSN1~4]
; uart2_rts
; Data.Set PM:0x03050208 %long 0x008F3164
; uart2_cts
; Data.Set PM:0x03050208 %long 0x00913364
; fastboot, check id pin
Data.Set PM:0x03050208 %long 0x00913361
Data.Set PM:0x03050210 %long 0x55667788
Data.Set PM:0x03050218 %long 0x44332211
Data.Set PM:0x03050220 %long 0x88776655
Data.Set PM:0x03050000 %long 0x30
print "Program cv1822 fpga efuse done"
print "Program cv1822 fpga efuse"
Data.Set PM:0x03050000 %long 0x10
; [Write scs_config]
; Data.Set PM:0x03050340 %long 0x00000044
; [Write FTSN1~4]
; uart2_rts
; Data.Set PM:0x03050208 %long 0x008F3164
; uart2_cts
; Data.Set PM:0x03050208 %long 0x00913364
; fastboot, check id pin
Data.Set PM:0x03050208 %long 0x00913361
Data.Set PM:0x03050210 %long 0x55667788
Data.Set PM:0x03050218 %long 0x44332211
Data.Set PM:0x03050220 %long 0x88776655
Data.Set PM:0x03050000 %long 0x30
print "Program cv1822 fpga efuse done"
build/tools/cv182x/cmm/fpga/cv1822_fpga_prog_usb_efuse.cmm
View file @ 694372a5
print "Program cv1822 fpga efuse"
Data.Set PM:0x03050000 %long 0x10
; [Write userconf]
Data.Set PM:0x03050258 %long 0x0E000002
;Data.Set PM:0x03050260 %long 0x00123490
;Data.Set PM:0x03050260 %long 0x000000A0
Data.Set PM:0x03050000 %long 0x30
print "Program cv1822 fpga efuse done"
print "Program cv1822 fpga efuse"
Data.Set PM:0x03050000 %long 0x10
; [Write userconf]
Data.Set PM:0x03050258 %long 0x0E000002
;Data.Set PM:0x03050260 %long 0x00123490
;Data.Set PM:0x03050260 %long 0x000000A0
Data.Set PM:0x03050000 %long 0x30
print "Program cv1822 fpga efuse done"
build/tools/cv183x/cmm/asic/cv1835_core_reset.cmm
View file @ 694372a5
rsystem.attach
VectorCatch.RESET ON
go
break
WAIT !ISRUN() ;wait until target stop
IF ISCONNECT()
PRINT "Connect to target"
break
ELSE
dialog.ok "Not connect"
; Clear ATF multicore mailbox region
; entry, core[0, 1] state
Data.Set PM:0xe00f000 %quad 0
Data.Set PM:0xe00f008 %quad 0
Data.Set PM:0xe00f010 %quad 0
Data.Set PM:0xe00f018 %quad 0
Data.Set PM:0xe00f020 %quad 0
Data.Set EAXI:0x3000004 %long 0x00020000
Data.Set EAXI:0x3000008 %long 0x0000012C
Data.Set EAXI:0x3003008 %long 0xFFFFEFFF
rsystem.attach
VectorCatch.RESET ON
go
break
WAIT !ISRUN() ;wait until target stop
IF ISCONNECT()
PRINT "Connect to target"
break
ELSE
dialog.ok "Not connect"
; Clear ATF multicore mailbox region
; entry, core[0, 1] state
Data.Set PM:0xe00f000 %quad 0
Data.Set PM:0xe00f008 %quad 0
Data.Set PM:0xe00f010 %quad 0
Data.Set PM:0xe00f018 %quad 0
Data.Set PM:0xe00f020 %quad 0
Data.Set EAXI:0x3000004 %long 0x00020000
Data.Set EAXI:0x3000008 %long 0x0000012C
Data.Set EAXI:0x3003008 %long 0xFFFFEFFF
PRINT "cv1835 core reset complete"
\ No newline at end of file
build/tools/cv183x/cmm/asic/cv183x_eaxi_reg_dump.cmm
View file @ 694372a5
FILEOpen 23. test_new.txt
FILEWrite 23. "EAXI:0x01810090"
FILEWrite 23. MREAD("S32", EAXI:0x01810090)
FILEWrite 23. "EAXI:0x01810094"
FILEWrite 23. MREAD("S32", EAXI:0x01810094)
FILEWrite 23. "EAXI:0x01810098"
FILEWrite 23. MREAD("S32", EAXI:0x01810098)
FILEWrite 23. "EAXI:0x0181009C"
FILEWrite 23. MREAD("S32", EAXI:0x0181009C)
FILEWrite 23. "EAXI:0x018100A0"
FILEWrite 23. MREAD("S32", EAXI:0x018100A0)
FILEWrite 23. "EAXI:0x018100A4"
FILEWrite 23. MREAD("S32", EAXI:0x018100A4)
FILEWrite 23. "read sys_ctrl debug (32)"
&index=0x0
&value=0x0
while (&index<0xA)
(
FILEWrite 23. "Write EAXI:0x01810024 0x" &value
data.set EAXI:0x01810024 %Long &value
FILEWrite 23. "Read EAXI:0x01810054"
FILEWrite 23. MREAD("S32", EAXI:0x01810054)
&index=&index+1
&value=&value+0x00000100
)
&index=0x0
&value=0x200
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x01810028 0x" &value
data.set EAXI:0x01810028 %Long &value
FILEWrite 23. "Read EAXI:0x01810058"
FILEWrite 23. MREAD("S32", EAXI:0x01810058)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x0181002C 0x" &value
data.set EAXI:0x0181002C %Long &value
FILEWrite 23. "Read EAXI:0x0181005C"
FILEWrite 23. MREAD("S32", EAXI:0x0181005C)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x01810030 0x" &value
data.set EAXI:0x01810030 %Long &value
FILEWrite 23. "Read EAXI:0x01810060"
FILEWrite 23. MREAD("S32", EAXI:0x01810060)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x30)
(
FILEWrite 23. "Write EAXI:0x01810034 0x" &value
data.set EAXI:0x01810034 %Long &value
FILEWrite 23. "Read EAXI:0x01810064"
FILEWrite 23. MREAD("S32", EAXI:0x01810064)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x0
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x01810038 0x" &value
data.set EAXI:0x01810038 %Long &value
FILEWrite 23. "Read EAXI:0x01810068"
FILEWrite 23. MREAD("S32", EAXI:0x01810068)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x0181003C 0x" &value
data.set EAXI:0x0181003C %Long &value
FILEWrite 23. "Read EAXI:0x0181006C"
FILEWrite 23. MREAD("S32", EAXI:0x0181006C)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x01810040 0x" &value
data.set EAXI:0x01810040 %Long &value
FILEWrite 23. "Read EAXI:0x01810070"
FILEWrite 23. MREAD("S32", EAXI:0x01810070)
&index=&index+1
&value=&value+0x00000001
)
FILECLose 23.
ENDEXE
FILEOpen 23. test_new.txt
FILEWrite 23. "EAXI:0x01810090"
FILEWrite 23. MREAD("S32", EAXI:0x01810090)
FILEWrite 23. "EAXI:0x01810094"
FILEWrite 23. MREAD("S32", EAXI:0x01810094)
FILEWrite 23. "EAXI:0x01810098"
FILEWrite 23. MREAD("S32", EAXI:0x01810098)
FILEWrite 23. "EAXI:0x0181009C"
FILEWrite 23. MREAD("S32", EAXI:0x0181009C)
FILEWrite 23. "EAXI:0x018100A0"
FILEWrite 23. MREAD("S32", EAXI:0x018100A0)
FILEWrite 23. "EAXI:0x018100A4"
FILEWrite 23. MREAD("S32", EAXI:0x018100A4)
FILEWrite 23. "read sys_ctrl debug (32)"
&index=0x0
&value=0x0
while (&index<0xA)
(
FILEWrite 23. "Write EAXI:0x01810024 0x" &value
data.set EAXI:0x01810024 %Long &value
FILEWrite 23. "Read EAXI:0x01810054"
FILEWrite 23. MREAD("S32", EAXI:0x01810054)
&index=&index+1
&value=&value+0x00000100
)
&index=0x0
&value=0x200
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x01810028 0x" &value
data.set EAXI:0x01810028 %Long &value
FILEWrite 23. "Read EAXI:0x01810058"
FILEWrite 23. MREAD("S32", EAXI:0x01810058)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x0181002C 0x" &value
data.set EAXI:0x0181002C %Long &value
FILEWrite 23. "Read EAXI:0x0181005C"
FILEWrite 23. MREAD("S32", EAXI:0x0181005C)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x01810030 0x" &value
data.set EAXI:0x01810030 %Long &value
FILEWrite 23. "Read EAXI:0x01810060"
FILEWrite 23. MREAD("S32", EAXI:0x01810060)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x30)
(
FILEWrite 23. "Write EAXI:0x01810034 0x" &value
data.set EAXI:0x01810034 %Long &value
FILEWrite 23. "Read EAXI:0x01810064"
FILEWrite 23. MREAD("S32", EAXI:0x01810064)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x0
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x01810038 0x" &value
data.set EAXI:0x01810038 %Long &value
FILEWrite 23. "Read EAXI:0x01810068"
FILEWrite 23. MREAD("S32", EAXI:0x01810068)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x0181003C 0x" &value
data.set EAXI:0x0181003C %Long &value
FILEWrite 23. "Read EAXI:0x0181006C"
FILEWrite 23. MREAD("S32", EAXI:0x0181006C)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x01810040 0x" &value
data.set EAXI:0x01810040 %Long &value
FILEWrite 23. "Read EAXI:0x01810070"
FILEWrite 23. MREAD("S32", EAXI:0x01810070)
&index=&index+1
&value=&value+0x00000001
)
FILECLose 23.
ENDEXE
build/tools/cv183x/cmm/asic/cv183x_reg_dump.cmm
View file @ 694372a5
FILEOpen 23. test_new.txt
FILEWrite 23. "EAXI:0x01810090"
FILEWrite 23. MREAD("S32", EAXI:0x01810090)
FILEWrite 23. "EAXI:0x01810094"
FILEWrite 23. MREAD("S32", EAXI:0x01810094)
FILEWrite 23. "EAXI:0x01810098"
FILEWrite 23. MREAD("S32", EAXI:0x01810098)
FILEWrite 23. "EAXI:0x0181009C"
FILEWrite 23. MREAD("S32", EAXI:0x0181009C)
FILEWrite 23. "EAXI:0x018100A0"
FILEWrite 23. MREAD("S32", EAXI:0x018100A0)
FILEWrite 23. "EAXI:0x018100A4"
FILEWrite 23. MREAD("S32", EAXI:0x018100A4)
FILEWrite 23. "read sys_ctrl debug (32)"
&index=0x0
&value=0x0
while (&index<0xA)
(
FILEWrite 23. "Write EAXI:0x01810024 0x" &value
data.set EAXI:0x01810024 %Long &value
FILEWrite 23. "Read EAXI:0x01810054"
FILEWrite 23. MREAD("S32", EAXI:0x01810054)
&index=&index+1
&value=&value+0x00000100
)
&index=0x0
&value=0x200
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x01810028 0x" &value
data.set EAXI:0x01810028 %Long &value
FILEWrite 23. "Read EAXI:0x01810058"
FILEWrite 23. MREAD("S32", EAXI:0x01810058)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x0181002C 0x" &value
data.set EAXI:0x0181002C %Long &value
FILEWrite 23. "Read EAXI:0x0181005C"
FILEWrite 23. MREAD("S32", EAXI:0x0181005C)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x01810030 0x" &value
data.set EAXI:0x01810030 %Long &value
FILEWrite 23. "Read EAXI:0x01810060"
FILEWrite 23. MREAD("S32", EAXI:0x01810060)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x30)
(
FILEWrite 23. "Write EAXI:0x01810034 0x" &value
data.set EAXI:0x01810034 %Long &value
FILEWrite 23. "Read EAXI:0x01810064"
FILEWrite 23. MREAD("S32", EAXI:0x01810064)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x0
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x01810038 0x" &value
data.set EAXI:0x01810038 %Long &value
FILEWrite 23. "Read EAXI:0x01810068"
FILEWrite 23. MREAD("S32", EAXI:0x01810068)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x0181003C 0x" &value
data.set EAXI:0x0181003C %Long &value
FILEWrite 23. "Read EAXI:0x0181006C"
FILEWrite 23. MREAD("S32", EAXI:0x0181006C)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x01810040 0x" &value
data.set EAXI:0x01810040 %Long &value
FILEWrite 23. "Read EAXI:0x01810070"
FILEWrite 23. MREAD("S32", EAXI:0x01810070)
&index=&index+1
&value=&value+0x00000001
)
FILECLose 23.
ENDEXE
FILEOpen 23. test_new.txt
FILEWrite 23. "EAXI:0x01810090"
FILEWrite 23. MREAD("S32", EAXI:0x01810090)
FILEWrite 23. "EAXI:0x01810094"
FILEWrite 23. MREAD("S32", EAXI:0x01810094)
FILEWrite 23. "EAXI:0x01810098"
FILEWrite 23. MREAD("S32", EAXI:0x01810098)
FILEWrite 23. "EAXI:0x0181009C"
FILEWrite 23. MREAD("S32", EAXI:0x0181009C)
FILEWrite 23. "EAXI:0x018100A0"
FILEWrite 23. MREAD("S32", EAXI:0x018100A0)
FILEWrite 23. "EAXI:0x018100A4"
FILEWrite 23. MREAD("S32", EAXI:0x018100A4)
FILEWrite 23. "read sys_ctrl debug (32)"
&index=0x0
&value=0x0
while (&index<0xA)
(
FILEWrite 23. "Write EAXI:0x01810024 0x" &value
data.set EAXI:0x01810024 %Long &value
FILEWrite 23. "Read EAXI:0x01810054"
FILEWrite 23. MREAD("S32", EAXI:0x01810054)
&index=&index+1
&value=&value+0x00000100
)
&index=0x0
&value=0x200
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x01810028 0x" &value
data.set EAXI:0x01810028 %Long &value
FILEWrite 23. "Read EAXI:0x01810058"
FILEWrite 23. MREAD("S32", EAXI:0x01810058)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x0181002C 0x" &value
data.set EAXI:0x0181002C %Long &value
FILEWrite 23. "Read EAXI:0x0181005C"
FILEWrite 23. MREAD("S32", EAXI:0x0181005C)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x01810030 0x" &value
data.set EAXI:0x01810030 %Long &value
FILEWrite 23. "Read EAXI:0x01810060"
FILEWrite 23. MREAD("S32", EAXI:0x01810060)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x30)
(
FILEWrite 23. "Write EAXI:0x01810034 0x" &value
data.set EAXI:0x01810034 %Long &value
FILEWrite 23. "Read EAXI:0x01810064"
FILEWrite 23. MREAD("S32", EAXI:0x01810064)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x0
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x01810038 0x" &value
data.set EAXI:0x01810038 %Long &value
FILEWrite 23. "Read EAXI:0x01810068"
FILEWrite 23. MREAD("S32", EAXI:0x01810068)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x0181003C 0x" &value
data.set EAXI:0x0181003C %Long &value
FILEWrite 23. "Read EAXI:0x0181006C"
FILEWrite 23. MREAD("S32", EAXI:0x0181006C)
&index=&index+1
&value=&value+0x00000001
)
&index=0x0
&value=0x100
while (&index<0x20)
(
FILEWrite 23. "Write EAXI:0x01810040 0x" &value
data.set EAXI:0x01810040 %Long &value
FILEWrite 23. "Read EAXI:0x01810070"
FILEWrite 23. MREAD("S32", EAXI:0x01810070)
&index=&index+1
&value=&value+0x00000001
)
FILECLose 23.
ENDEXE
build/tools/cv183x/cmm/fpga/cv1835_core_reset.cmm
View file @ 694372a5
rsystem.attach
VectorCatch.RESET ON
go
break
WAIT !ISRUN() ;wait until target stop
IF ISCONNECT()
PRINT "Connect to target"
break
ELSE
dialog.ok "Not connect"
; Clear ATF multicore mailbox region
; entry, core[0, 1] state
Data.Set PM:0xe00f000 %quad 0
Data.Set PM:0xe00f008 %quad 0
Data.Set PM:0xe00f010 %quad 0
Data.Set PM:0xe00f018 %quad 0
Data.Set PM:0xe00f020 %quad 0
; Reset core0
Data.Set EAXI:0x3000008 %long 0x00000004
Data.Set EAPB:0x81010fb0 %long 0xc5acce55
Data.Set EAPB:0x81010300 %long 0x00000000
Data.Set EAPB:0x81010024 %long 0x00000002
Data.Set EAPB:0x81010310 %long 0x00000002
; Reset core1
Data.Set EAPB:0x81110fb0 %long 0xc5acce55
Data.Set EAPB:0x81110300 %long 0x00000000
Data.Set EAPB:0x81110024 %long 0x00000002
Data.Set EAPB:0x81110310 %long 0x00000002
PRINT "cv1835 core reset complete"
rsystem.attach
VectorCatch.RESET ON
go
break
WAIT !ISRUN() ;wait until target stop
IF ISCONNECT()
PRINT "Connect to target"
break
ELSE
dialog.ok "Not connect"
; Clear ATF multicore mailbox region
; entry, core[0, 1] state
Data.Set PM:0xe00f000 %quad 0
Data.Set PM:0xe00f008 %quad 0
Data.Set PM:0xe00f010 %quad 0
Data.Set PM:0xe00f018 %quad 0
Data.Set PM:0xe00f020 %quad 0
; Reset core0
Data.Set EAXI:0x3000008 %long 0x00000004
Data.Set EAPB:0x81010fb0 %long 0xc5acce55
Data.Set EAPB:0x81010300 %long 0x00000000
Data.Set EAPB:0x81010024 %long 0x00000002
Data.Set EAPB:0x81010310 %long 0x00000002
; Reset core1
Data.Set EAPB:0x81110fb0 %long 0xc5acce55
Data.Set EAPB:0x81110300 %long 0x00000000
Data.Set EAPB:0x81110024 %long 0x00000002
Data.Set EAPB:0x81110310 %long 0x00000002
PRINT "cv1835 core reset complete"
build/tools/cv183x/cmm/fpga/cv1835_fpga_prog_efuse.cmm
View file @ 694372a5
print "Program cv1835 fpga efuse"
Data.Set PM:0x03050000 %long 0x10
; [Write scs_config]
Data.Set PM:0x03050340 %long 0x01B00044
; [Set boot_speed2]
Data.Set PM:0x03050250 %long 0x00000800
; [Set single core]
;Data.Set PM:0x03050254 %long 0x00000003
; [Set platform nv counter]
;Data.Set PM:0x03050328 % long 0x0023001F
;Data.Set PM:0x03050328 % long 0xDC117899
; [Set platform market segment]
;Data.Set PM:0x03050228 % long 0xABCD7FAB
;Data.Set PM:0x03050228 % long 0xBA783456
; [Write root key hash to efuse]
Data.Set PM:0x03050350 %long 0x62bf31e1
Data.Set PM:0x03050358 %long 0x991fb4b4
Data.Set PM:0x03050360 %long 0x667040cd
Data.Set PM:0x03050368 %long 0xbefd8ba5
Data.Set PM:0x03050370 %long 0x1bb7cf29
Data.Set PM:0x03050378 %long 0x960dca9b
Data.Set PM:0x03050380 %long 0x64eef7ac
Data.Set PM:0x03050388 %long 0xef7481af
; [Write ldr decryption key to efuse]
Data.Set PM:0x030503B0 %long 0xDA353643
Data.Set PM:0x030503B8 %long 0xE6E97066
Data.Set PM:0x030503C0 %long 0x99C08F8E
Data.Set PM:0x030503C8 %long 0x33AD4D4E
; [Write userconf]
Data.Set PM:0x03050258 %long 0x0E00F382
Data.Set PM:0x03050260 %long 0x00000000
Data.Set PM:0x03050268 %long 0x0E000000
Data.Set PM:0x03050270 %long 0x01080305
Data.Set PM:0x03050000 %long 0x30
print "Program cv1835 fpga efuse done"
print "Program cv1835 fpga efuse"
Data.Set PM:0x03050000 %long 0x10
; [Write scs_config]
Data.Set PM:0x03050340 %long 0x01B00044
; [Set boot_speed2]
Data.Set PM:0x03050250 %long 0x00000800
; [Set single core]
;Data.Set PM:0x03050254 %long 0x00000003
; [Set platform nv counter]
;Data.Set PM:0x03050328 % long 0x0023001F
;Data.Set PM:0x03050328 % long 0xDC117899
; [Set platform market segment]
;Data.Set PM:0x03050228 % long 0xABCD7FAB
;Data.Set PM:0x03050228 % long 0xBA783456
; [Write root key hash to efuse]
Data.Set PM:0x03050350 %long 0x62bf31e1
Data.Set PM:0x03050358 %long 0x991fb4b4
Data.Set PM:0x03050360 %long 0x667040cd
Data.Set PM:0x03050368 %long 0xbefd8ba5
Data.Set PM:0x03050370 %long 0x1bb7cf29
Data.Set PM:0x03050378 %long 0x960dca9b
Data.Set PM:0x03050380 %long 0x64eef7ac
Data.Set PM:0x03050388 %long 0xef7481af
; [Write ldr decryption key to efuse]
Data.Set PM:0x030503B0 %long 0xDA353643
Data.Set PM:0x030503B8 %long 0xE6E97066
Data.Set PM:0x030503C0 %long 0x99C08F8E
Data.Set PM:0x030503C8 %long 0x33AD4D4E
; [Write userconf]
Data.Set PM:0x03050258 %long 0x0E00F382
Data.Set PM:0x03050260 %long 0x00000000
Data.Set PM:0x03050268 %long 0x0E000000
Data.Set PM:0x03050270 %long 0x01080305
Data.Set PM:0x03050000 %long 0x30
print "Program cv1835 fpga efuse done"
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