• Earle F. Philhower, III's avatar
    Avoid "chunkiness" of UART FIFO availability (#511) · 53043830
    Earle F. Philhower, III authored
    * Avoid "chunkiness" of UART FIFO availability
    
    The UART FIFO will generate an IRQ to transfer data into the SerialUART
    FIFOs either every 4 received bytes, or every 4 idle byte times.  This
    causes the ::available count to report "0" until either of those two
    cases happen, causing a potentially delay in data becoming available to
    the app.
    
    Change the code to pull data from the HW FIFO on a read/available/peek.
    Use a non-blocking mutex and IRQ disabling to safely empty the FIFO from
    user space.  The mutex added to the IRQ is non-blocking and will be
    a single CAS the vast majority of the time, so it should not impact the
    Serial performance.
    
    Fixes #464 and others where `setPollingMode()` was needed as a workaround.
    
    Make sure we have all mutexes locked before we disable the port and free
    the queue to avoid evil cases.
    
    Only init the mutexes once, on object creation.
    
    In polled mode, don't bother acquiring/releasing the fifo mutex.
    
    When begin() is called on an already running port, call end() to clean
    up the old data/etc. before making a new queue/config.  This avoids a
    memory leak and potential write-after-free case.
    53043830
SerialUART.cpp 10.9 KB