Add stub nrf_assert.h, revert previous drivers_nrf/hal/nrf_*.h changes

cores/nRF5/nRF5_SDK_11/components/drivers_nrf/hal/nrf_pwm.h

@@ -27,9 +27,8 @@
 #include <stdint.h>
 
 #include "nrf.h"
-#ifndef ARDUINO
 #include "nrf_assert.h"
-#endif
+
 
 /**
  * @brief This value can be provided as a parameter for the @ref nrf_pwm_pins_set
@@ -585,9 +584,7 @@ __STATIC_INLINE void nrf_pwm_configure(NRF_PWM_Type * p_pwm,
                                        nrf_pwm_mode_t mode,
                                        uint16_t       top_value)
 {
-#ifndef ARDUINO
     ASSERT(top_value <= PWM_COUNTERTOP_COUNTERTOP_Msk);
-#endif
 
     p_pwm->PRESCALER  = base_clock;
     p_pwm->MODE       = mode;
@@ -598,9 +595,7 @@ __STATIC_INLINE void nrf_pwm_sequence_set(NRF_PWM_Type * p_pwm,
                                           uint8_t                    seq_id,
                                           nrf_pwm_sequence_t const * p_seq)
 {
-#ifndef ARDUINO
     ASSERT(p_seq != NULL);
-#endif
 
     nrf_pwm_seq_ptr_set(      p_pwm, seq_id, p_seq->values.p_raw);
     nrf_pwm_seq_cnt_set(      p_pwm, seq_id, p_seq->length);
@@ -612,10 +607,8 @@ __STATIC_INLINE void nrf_pwm_seq_ptr_set(NRF_PWM_Type * p_pwm,
                                          uint8_t          seq_id,
                                          uint16_t const * p_values)
 {
-#ifndef ARDUINO
     ASSERT(seq_id <= 1);
     ASSERT(p_values != NULL);
-#endif
     p_pwm->SEQ[seq_id].PTR = (uint32_t)p_values;
 }
 
@@ -623,11 +616,9 @@ __STATIC_INLINE void nrf_pwm_seq_cnt_set(NRF_PWM_Type * p_pwm,
                                          uint8_t  seq_id,
                                          uint16_t length)
 {
-#ifndef ARDUINO
     ASSERT(seq_id <= 1);
     ASSERT(length != 0);
     ASSERT(length <= PWM_SEQ_CNT_CNT_Msk);
-#endif
     p_pwm->SEQ[seq_id].CNT = length;
 }
 
@@ -635,10 +626,8 @@ __STATIC_INLINE void nrf_pwm_seq_refresh_set(NRF_PWM_Type * p_pwm,
                                              uint8_t  seq_id,
                                              uint32_t refresh)
 {
-#ifndef ARDUINO
     ASSERT(seq_id <= 1);
     ASSERT(refresh <= PWM_SEQ_REFRESH_CNT_Msk);
-#endif
     p_pwm->SEQ[seq_id].REFRESH  = refresh;
 }
 
@@ -646,10 +635,8 @@ __STATIC_INLINE void nrf_pwm_seq_end_delay_set(NRF_PWM_Type * p_pwm,
                                                uint8_t  seq_id,
                                                uint32_t end_delay)
 {
-#ifndef ARDUINO
     ASSERT(seq_id <= 1);
     ASSERT(end_delay <= PWM_SEQ_ENDDELAY_CNT_Msk);
-#endif
     p_pwm->SEQ[seq_id].ENDDELAY = end_delay;
 }
 

cores/nRF5/nRF5_SDK_11/components/drivers_nrf/hal/nrf_rtc.h

@@ -29,9 +29,7 @@
 #include <stddef.h>
 #include <stdbool.h>
 #include "nrf.h"
-#ifndef ARDUINO
 #include "nrf_assert.h"
-#endif
 
 /**
  * @brief Macro for getting the number of compare channels available
@@ -270,9 +268,7 @@ __STATIC_INLINE uint32_t nrf_rtc_counter_get(NRF_RTC_Type * p_rtc)
 
 __STATIC_INLINE void nrf_rtc_prescaler_set(NRF_RTC_Type * p_rtc, uint32_t val)
 {
-#ifndef ARDUINO
     ASSERT(val <= (RTC_PRESCALER_PRESCALER_Msk >> RTC_PRESCALER_PRESCALER_Pos));
-#endif
     p_rtc->PRESCALER = val;
 }
 __STATIC_INLINE uint32_t rtc_prescaler_get(NRF_RTC_Type * p_rtc)

cores/nRF5/nRF5_SDK_11/components/drivers_nrf/hal/nrf_saadc.h

@@ -25,9 +25,7 @@
 #include <stdbool.h>
 #include <stddef.h>
 #include "nrf.h"
-#ifndef ARDUINO
 #include "nrf_assert.h"
-#endif
 
 #define NRF_SAADC_CHANNEL_COUNT 8
 
@@ -320,9 +318,7 @@ __STATIC_INLINE volatile uint32_t * nrf_saadc_event_address_get(nrf_saadc_event_
  */
 __STATIC_INLINE volatile uint32_t * nrf_saadc_event_limit_address_get(uint8_t channel, nrf_saadc_limit_t limit_type)
 {
-#ifndef ARDUINO
     ASSERT(channel < NRF_SAADC_CHANNEL_COUNT);
-#endif
     if (limit_type == NRF_SAADC_LIMIT_HIGH)
     {
         return &NRF_SAADC->EVENTS_CH[channel].LIMITH;
@@ -344,13 +340,13 @@ __STATIC_INLINE nrf_saadc_event_t nrf_saadc_event_limit_get(uint8_t channel, nrf
 {
     if (limit_type == NRF_SAADC_LIMIT_HIGH)
     {
-        return (nrf_saadc_event_t)( (uint32_t) NRF_SAADC_EVENT_CH0_LIMITH +
+        return (nrf_saadc_event_t)( (uint32_t) NRF_SAADC_EVENT_CH0_LIMITH + 
                         (uint32_t) (NRF_SAADC_EVENT_CH1_LIMITH - NRF_SAADC_EVENT_CH0_LIMITH)
                         * (uint32_t) channel );
     }
     else
     {
-        return (nrf_saadc_event_t)( (uint32_t) NRF_SAADC_EVENT_CH0_LIMITL +
+        return (nrf_saadc_event_t)( (uint32_t) NRF_SAADC_EVENT_CH0_LIMITL + 
                         (uint32_t) (NRF_SAADC_EVENT_CH1_LIMITL - NRF_SAADC_EVENT_CH0_LIMITL)
                         * (uint32_t) channel );
     }
@@ -426,7 +422,7 @@ __STATIC_INLINE void nrf_saadc_int_disable(uint32_t saadc_int_mask)
 
 /**
  * @brief Function for generating masks for SAADC channel limit interrupts.
- *
+ * 
  * @param[in] channel    SAADC channel number.
  * @param[in] limit_type Limit type.
  *
@@ -434,9 +430,7 @@ __STATIC_INLINE void nrf_saadc_int_disable(uint32_t saadc_int_mask)
  */
 __STATIC_INLINE uint32_t nrf_saadc_limit_int_get(uint8_t channel, nrf_saadc_limit_t limit_type)
 {
-#ifndef ARDUINO
     ASSERT(channel < NRF_SAADC_CHANNEL_COUNT);
-#endif
     uint32_t mask = (limit_type == NRF_SAADC_LIMIT_LOW) ? NRF_SAADC_INT_CH0LIMITL : NRF_SAADC_INT_CH0LIMITH;
     return mask << (channel * 2);
 }
@@ -516,7 +510,7 @@ __STATIC_INLINE uint16_t nrf_saadc_amount_get(void)
 
 /**
  * @brief Function for setting the SAADC sample resolution.
- *
+ * 
  * @param[in] resolution Bit resolution.
  */
 __STATIC_INLINE void nrf_saadc_resolution_set(nrf_saadc_resolution_t resolution)

cores/nRF5/nRF5_SDK_11/components/drivers_nrf/hal/nrf_twis.h

@@ -22,9 +22,7 @@
 #define NRF_TWIS_H__
 
 #include "nrf.h"
-#ifndef ARDUINO
 #include "nrf_drv_config.h"
-#endif
 #include <stdint.h>
 #include <stddef.h>
 #include <stdbool.h>

cores/nRF5/nrf_assert.h

+#ifndef NRF_ASSERT_H_
+#define NRF_ASSERT_H_
+
+#define ASSERT(expr)
+
+#endif