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xpstem
arduino-esp32
Commits
f69bbfee
Unverified
Commit
f69bbfee
authored
Feb 13, 2023
by
Ha Thach
Committed by
GitHub
Feb 13, 2023
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fix usb_switch_to_cdc_jtag() not re-enable USB D+ before reset (#7828)
parent
2ddce3c1
Changes
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cores/esp32/esp32-hal-tinyusb.c
cores/esp32/esp32-hal-tinyusb.c
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cores/esp32/esp32-hal-tinyusb.c
View file @
f69bbfee
...
@@ -40,6 +40,7 @@
...
@@ -40,6 +40,7 @@
#include "esp32s2/rom/usb/chip_usb_dw_wrapper.h"
#include "esp32s2/rom/usb/chip_usb_dw_wrapper.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#elif CONFIG_IDF_TARGET_ESP32S3
#include "hal/usb_serial_jtag_ll.h"
#include "hal/usb_serial_jtag_ll.h"
#include "hal/usb_phy_ll.h"
#include "esp32s3/rom/usb/usb_persist.h"
#include "esp32s3/rom/usb/usb_persist.h"
#include "esp32s3/rom/usb/usb_dc.h"
#include "esp32s3/rom/usb/usb_dc.h"
#include "esp32s3/rom/usb/chip_usb_dw_wrapper.h"
#include "esp32s3/rom/usb/chip_usb_dw_wrapper.h"
...
@@ -415,6 +416,7 @@ static void usb_switch_to_cdc_jtag(){
...
@@ -415,6 +416,7 @@ static void usb_switch_to_cdc_jtag(){
digitalWrite
(
USBPHY_DP_NUM
,
LOW
);
digitalWrite
(
USBPHY_DP_NUM
,
LOW
);
// Initialize CDC+JTAG ISR to listen for BUS_RESET
// Initialize CDC+JTAG ISR to listen for BUS_RESET
usb_phy_ll_int_jtag_enable
(
&
USB_SERIAL_JTAG
);
usb_serial_jtag_ll_disable_intr_mask
(
USB_SERIAL_JTAG_LL_INTR_MASK
);
usb_serial_jtag_ll_disable_intr_mask
(
USB_SERIAL_JTAG_LL_INTR_MASK
);
usb_serial_jtag_ll_clr_intsts_mask
(
USB_SERIAL_JTAG_LL_INTR_MASK
);
usb_serial_jtag_ll_clr_intsts_mask
(
USB_SERIAL_JTAG_LL_INTR_MASK
);
usb_serial_jtag_ll_ena_intr_mask
(
USB_SERIAL_JTAG_INTR_BUS_RESET
);
usb_serial_jtag_ll_ena_intr_mask
(
USB_SERIAL_JTAG_INTR_BUS_RESET
);
...
...
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