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Unverified Commit c4cbc3e6 authored by CircuitART's avatar CircuitART Committed by GitHub
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feat(board): Add CircuitART Zero S3 board (#10108) 

* new board esp32s3

* Update boards.txt

add circuitart_zero_s3 details

* Update pins_arduino.h

 removed unnecessary pin definitions pins_arduino.h as suggested by P-R-O-C-H-Y

* ci(pre-commit): Apply automatic fixes

---------
Co-authored-by: default avatarpre-commit-ci-lite[bot] <117423508+pre-commit-ci-lite[bot]@users.noreply.github.com>
parent 70786dc5
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boards.txt
View file @ c4cbc3e6
......@@ -38845,3 +38845,164 @@ elecrow_crowpanel_7.menu.EraseFlash.all=Enabled
elecrow_crowpanel_7.menu.EraseFlash.all.upload.erase_cmd=-e
##############################################################
circuitart_zero_s3.name=CircuitART Zero S3
circuitart_zero_s3.vid.0=0x303a
circuitart_zero_s3.pid.0=0x80DB
circuitart_zero_s3.bootloader.tool=esptool_py
circuitart_zero_s3.bootloader.tool.default=esptool_py
circuitart_zero_s3.upload.tool=esptool_py
circuitart_zero_s3.upload.tool.default=esptool_py
circuitart_zero_s3.upload.tool.network=esp_ota
circuitart_zero_s3.upload.maximum_size=1310720
circuitart_zero_s3.upload.maximum_data_size=327680
circuitart_zero_s3.upload.flags=
circuitart_zero_s3.upload.extra_flags=
circuitart_zero_s3.upload.use_1200bps_touch=false
circuitart_zero_s3.upload.wait_for_upload_port=false
circuitart_zero_s3.serial.disableDTR=false
circuitart_zero_s3.serial.disableRTS=false
circuitart_zero_s3.build.tarch=xtensa
circuitart_zero_s3.build.bootloader_addr=0x0
circuitart_zero_s3.build.target=esp32s3
circuitart_zero_s3.build.mcu=esp32s3
circuitart_zero_s3.build.core=esp32
circuitart_zero_s3.build.variant=circuitart_zero_s3
circuitart_zero_s3.build.board=CIRCUITART_ZERO_S3
circuitart_zero_s3.build.usb_mode=1
circuitart_zero_s3.build.cdc_on_boot=0
circuitart_zero_s3.build.msc_on_boot=0
circuitart_zero_s3.build.dfu_on_boot=0
circuitart_zero_s3.build.f_cpu=240000000L
circuitart_zero_s3.build.flash_size=16MB
circuitart_zero_s3.build.flash_freq=80m
circuitart_zero_s3.build.flash_mode=dio
circuitart_zero_s3.build.boot=qio
circuitart_zero_s3.build.partitions=default
circuitart_zero_s3.build.defines=
circuitart_zero_s3.build.loop_core=
circuitart_zero_s3.build.event_core=
circuitart_zero_s3.build.flash_type=qio
circuitart_zero_s3.build.psram_type=qspi
circuitart_zero_s3.build.memory_type=qio_qspi
circuitart_zero_s3.menu.LoopCore.1=Core 1
circuitart_zero_s3.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1
circuitart_zero_s3.menu.LoopCore.0=Core 0
circuitart_zero_s3.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0
circuitart_zero_s3.menu.EventsCore.1=Core 1
circuitart_zero_s3.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1
circuitart_zero_s3.menu.EventsCore.0=Core 0
circuitart_zero_s3.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0
circuitart_zero_s3.menu.USBMode.default=USB-OTG (TinyUSB)
circuitart_zero_s3.menu.USBMode.default.build.usb_mode=0
circuitart_zero_s3.menu.USBMode.hwcdc=Hardware CDC and JTAG
circuitart_zero_s3.menu.USBMode.hwcdc.build.usb_mode=1
circuitart_zero_s3.menu.CDCOnBoot.cdc=Enabled
circuitart_zero_s3.menu.CDCOnBoot.cdc.build.cdc_on_boot=1
circuitart_zero_s3.menu.CDCOnBoot.default=Disabled
circuitart_zero_s3.menu.CDCOnBoot.default.build.cdc_on_boot=0
circuitart_zero_s3.menu.MSCOnBoot.default=Disabled
circuitart_zero_s3.menu.MSCOnBoot.default.build.msc_on_boot=0
circuitart_zero_s3.menu.MSCOnBoot.msc=Enabled (Requires USB-OTG Mode)
circuitart_zero_s3.menu.MSCOnBoot.msc.build.msc_on_boot=1
circuitart_zero_s3.menu.DFUOnBoot.default=Disabled
circuitart_zero_s3.menu.DFUOnBoot.default.build.dfu_on_boot=0
circuitart_zero_s3.menu.DFUOnBoot.dfu=Enabled (Requires USB-OTG Mode)
circuitart_zero_s3.menu.DFUOnBoot.dfu.build.dfu_on_boot=1
circuitart_zero_s3.menu.UploadMode.cdc=USB-OTG CDC (TinyUSB)
circuitart_zero_s3.menu.UploadMode.cdc.upload.use_1200bps_touch=true
circuitart_zero_s3.menu.UploadMode.cdc.upload.wait_for_upload_port=true
circuitart_zero_s3.menu.UploadMode.default=UART0 / Hardware CDC
circuitart_zero_s3.menu.UploadMode.default.upload.use_1200bps_touch=false
circuitart_zero_s3.menu.UploadMode.default.upload.wait_for_upload_port=false
circuitart_zero_s3.menu.PSRAM.enabled=Enabled
circuitart_zero_s3.menu.PSRAM.enabled.build.defines=-DBOARD_HAS_PSRAM
circuitart_zero_s3.menu.PSRAM.disabled=Disabled
circuitart_zero_s3.menu.PSRAM.disabled.build.defines=
circuitart_zero_s3.menu.PartitionScheme.default_16MB=Default (6.25MB APP/3.43MB SPIFFS)
circuitart_zero_s3.menu.PartitionScheme.default_16MB.build.partitions=default_16MB
circuitart_zero_s3.menu.PartitionScheme.default_16MB.upload.maximum_size=6553600
circuitart_zero_s3.menu.PartitionScheme.tinyuf2=TinyUF2 Compatibility (2MB APP/12MB FFAT)
circuitart_zero_s3.menu.PartitionScheme.tinyuf2.build.custom_bootloader=bootloader_tinyuf2
circuitart_zero_s3.menu.PartitionScheme.tinyuf2.build.custom_partitions=partitions_tinyuf2
circuitart_zero_s3.menu.PartitionScheme.tinyuf2.upload.extra_flags=0x410000 "{runtime.platform.path}/variants/{build.variant}/tinyuf2.bin"
circuitart_zero_s3.menu.PartitionScheme.tinyuf2.upload.maximum_size=2097152
circuitart_zero_s3.menu.PartitionScheme.large_spiffs=Large SPIFFS (4.5MB APP/6.93MB SPIFFS)
circuitart_zero_s3.menu.PartitionScheme.large_spiffs.build.partitions=large_spiffs_16MB
circuitart_zero_s3.menu.PartitionScheme.large_spiffs.upload.maximum_size=4718592
circuitart_zero_s3.menu.PartitionScheme.app3M_fat9M_16MB=FFAT (3MB APP/9MB FATFS)
circuitart_zero_s3.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB
circuitart_zero_s3.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728
circuitart_zero_s3.menu.PartitionScheme.fatflash=Large FFAT (2MB APP/12.5MB FATFS)
circuitart_zero_s3.menu.PartitionScheme.fatflash.build.partitions=ffat
circuitart_zero_s3.menu.PartitionScheme.fatflash.upload.maximum_size=2097152
circuitart_zero_s3.menu.CPUFreq.240=240MHz (WiFi)
circuitart_zero_s3.menu.CPUFreq.240.build.f_cpu=240000000L
circuitart_zero_s3.menu.CPUFreq.160=160MHz (WiFi)
circuitart_zero_s3.menu.CPUFreq.160.build.f_cpu=160000000L
circuitart_zero_s3.menu.CPUFreq.80=80MHz (WiFi)
circuitart_zero_s3.menu.CPUFreq.80.build.f_cpu=80000000L
circuitart_zero_s3.menu.CPUFreq.40=40MHz
circuitart_zero_s3.menu.CPUFreq.40.build.f_cpu=40000000L
circuitart_zero_s3.menu.CPUFreq.20=20MHz
circuitart_zero_s3.menu.CPUFreq.20.build.f_cpu=20000000L
circuitart_zero_s3.menu.CPUFreq.10=10MHz
circuitart_zero_s3.menu.CPUFreq.10.build.f_cpu=10000000L
circuitart_zero_s3.menu.FlashMode.qio=QIO
circuitart_zero_s3.menu.FlashMode.qio.build.flash_mode=dio
circuitart_zero_s3.menu.FlashMode.qio.build.boot=qio
circuitart_zero_s3.menu.FlashMode.dio=DIO
circuitart_zero_s3.menu.FlashMode.dio.build.flash_mode=dio
circuitart_zero_s3.menu.FlashMode.dio.build.boot=dio
circuitart_zero_s3.menu.UploadSpeed.921600=921600
circuitart_zero_s3.menu.UploadSpeed.921600.upload.speed=921600
circuitart_zero_s3.menu.UploadSpeed.115200=115200
circuitart_zero_s3.menu.UploadSpeed.115200.upload.speed=115200
circuitart_zero_s3.menu.UploadSpeed.256000.windows=256000
circuitart_zero_s3.menu.UploadSpeed.256000.upload.speed=256000
circuitart_zero_s3.menu.UploadSpeed.230400.windows.upload.speed=256000
circuitart_zero_s3.menu.UploadSpeed.230400=230400
circuitart_zero_s3.menu.UploadSpeed.230400.upload.speed=230400
circuitart_zero_s3.menu.UploadSpeed.460800.linux=460800
circuitart_zero_s3.menu.UploadSpeed.460800.macosx=460800
circuitart_zero_s3.menu.UploadSpeed.460800.upload.speed=460800
circuitart_zero_s3.menu.UploadSpeed.512000.windows=512000
circuitart_zero_s3.menu.UploadSpeed.512000.upload.speed=512000
circuitart_zero_s3.menu.DebugLevel.none=None
circuitart_zero_s3.menu.DebugLevel.none.build.code_debug=0
circuitart_zero_s3.menu.DebugLevel.error=Error
circuitart_zero_s3.menu.DebugLevel.error.build.code_debug=1
circuitart_zero_s3.menu.DebugLevel.warn=Warn
circuitart_zero_s3.menu.DebugLevel.warn.build.code_debug=2
circuitart_zero_s3.menu.DebugLevel.info=Info
circuitart_zero_s3.menu.DebugLevel.info.build.code_debug=3
circuitart_zero_s3.menu.DebugLevel.debug=Debug
circuitart_zero_s3.menu.DebugLevel.debug.build.code_debug=4
circuitart_zero_s3.menu.DebugLevel.verbose=Verbose
circuitart_zero_s3.menu.DebugLevel.verbose.build.code_debug=5
circuitart_zero_s3.menu.EraseFlash.none=Disabled
circuitart_zero_s3.menu.EraseFlash.none.upload.erase_cmd=
circuitart_zero_s3.menu.EraseFlash.all=Enabled
circuitart_zero_s3.menu.EraseFlash.all.upload.erase_cmd=-e
##############################################################
variants/circuitart_zero_s3/partitions_tinyuf2.csv 0 → 100644
View file @ c4cbc3e6
# ESP-IDF Partition Table
# Name, Type, SubType, Offset, Size, Flags
# bootloader.bin,, 0x1000, 32K
# partition table,, 0x8000, 4K
nvs, data, nvs, 0x9000, 20K,
otadata, data, ota, 0xe000, 8K,
ota_0, app, ota_0, 0x10000, 2048K,
ota_1, app, ota_1, 0x210000, 2048K,
uf2, app, factory,0x410000, 256K,
ffat, data, fat, 0x450000, 11968K,
variants/circuitart_zero_s3/pins_arduino.h 0 → 100644
View file @ c4cbc3e6
#ifndef Pins_Arduino_h
#define Pins_Arduino_h
#include <stdint.h>
#define USB_VID 0x303A
#define USB_PID 0x80DB
#define USB_MANUFACTURER "CircuitART"
#define USB_PRODUCT "ZeroS3"
#define USB_SERIAL "" // Empty string for MAC adddress
// User LED
#define LED_BUILTIN 46
#define BUILTIN_LED LED_BUILTIN // backward compatibility
// Neopixel
#define PIN_NEOPIXEL 47
// RGB_BUILTIN and RGB_BRIGHTNESS can be used in new Arduino API neopixelWrite() and digitalWrite() for blinking
#define RGB_BUILTIN (PIN_NEOPIXEL + SOC_GPIO_PIN_COUNT)
#define RGB_BRIGHTNESS 64
#define NEOPIXEL_NUM 1 // number of neopixels
static const uint8_t KEY_BUILTIN = 0;
static const uint8_t TFT_DC = 5;
static const uint8_t TFT_CS = 39;
static const uint8_t TFT_RST = 40;
static const uint8_t TFT_RESET = 40;
static const uint8_t SD_CS = 42;
static const uint8_t SD_CHIP_SELECT = 42;
static const uint8_t TX = 43;
static const uint8_t RX = 44;
static const uint8_t TX0 = 43;
static const uint8_t RX0 = 44;
static const uint8_t TX1 = 40;
static const uint8_t RX2 = 41;
static const uint8_t SDA = 33;
static const uint8_t SCL = 34;
static const uint8_t SS = 39;
static const uint8_t MOSI = 35;
static const uint8_t SCK = 36;
static const uint8_t MISO = 37;
static const uint8_t DAC1 = 17;
static const uint8_t DAC2 = 18;
static const uint8_t A0 = 1;
static const uint8_t A1 = 2;
static const uint8_t A2 = 3;
static const uint8_t A3 = 4;
static const uint8_t A4 = 5;
static const uint8_t A5 = 6;
static const uint8_t A6 = 7;
static const uint8_t A7 = 8;
static const uint8_t A8 = 9;
static const uint8_t A9 = 10;
static const uint8_t A10 = 11;
static const uint8_t A11 = 12;
static const uint8_t A12 = 13;
static const uint8_t A13 = 14;
static const uint8_t A14 = 15;
static const uint8_t A15 = 16;
static const uint8_t A16 = 17;
static const uint8_t A17 = 18;
static const uint8_t T1 = 1;
static const uint8_t T2 = 2;
static const uint8_t T3 = 3;
static const uint8_t T4 = 4;
static const uint8_t T5 = 5;
static const uint8_t T6 = 6;
static const uint8_t T7 = 7;
static const uint8_t T8 = 8;
static const uint8_t T9 = 9;
static const uint8_t T10 = 10;
static const uint8_t T11 = 11;
static const uint8_t T12 = 12;
static const uint8_t T13 = 13;
static const uint8_t T14 = 14;
static const uint8_t T15 = 15;
static const uint8_t D0 = 0;
static const uint8_t D1 = 1;
static const uint8_t D2 = 2;
static const uint8_t D3 = 3;
static const uint8_t D4 = 4;
static const uint8_t D5 = 5;
static const uint8_t D6 = 6;
static const uint8_t D7 = 7;
static const uint8_t D8 = 8;
static const uint8_t D9 = 9;
static const uint8_t D10 = 10;
static const uint8_t D11 = 11;
static const uint8_t D12 = 12;
static const uint8_t D13 = 13;
static const uint8_t D14 = 14;
static const uint8_t D15 = 15;
static const uint8_t D16 = 16;
static const uint8_t D17 = 17;
static const uint8_t D18 = 18;
static const uint8_t D33 = 33;
static const uint8_t D34 = 34;
static const uint8_t D35 = 35;
static const uint8_t D36 = 36;
static const uint8_t D37 = 37;
static const uint8_t D38 = 38;
static const uint8_t D39 = 39;
static const uint8_t D40 = 40;
static const uint8_t D41 = 41;
// Camera
#define TFT_CAM_POWER 21
#define PWDN_GPIO_NUM -1 // connected through expander
#define RESET_GPIO_NUM -1 // connected through expander
#define XCLK_GPIO_NUM 15
#define SIOD_GPIO_NUM SDA
#define SIOC_GPIO_NUM SCL
#define Y9_GPIO_NUM 14 //16
#define Y8_GPIO_NUM 13 //14
#define Y7_GPIO_NUM 11 //13
#define Y6_GPIO_NUM 10
#define Y5_GPIO_NUM 9 //8
#define Y4_GPIO_NUM 8 //6
#define Y3_GPIO_NUM 7
#define Y2_GPIO_NUM 6 //9
#define VSYNC_GPIO_NUM 38
#define HREF_GPIO_NUM 48
#define PCLK_GPIO_NUM 16 //11
#endif /* Pins_Arduino_h */
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