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xpstem
TFT_eSPI
Commits
1c66d306
Commit
1c66d306
authored
Aug 15, 2020
by
Bodmer
Browse files
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Plain Diff
Add SSD1963 for #704
Remove setWindow optimisation clash with TFT_eFEX
parent
a8cd5c5d
Changes
9
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9 changed files
with
433 additions
and
23 deletions
+433
-23
TFT_Drivers/SSD1963_Defines.h
TFT_Drivers/SSD1963_Defines.h
+48
-0
TFT_Drivers/SSD1963_Init.h
TFT_Drivers/SSD1963_Init.h
+306
-0
TFT_Drivers/SSD1963_Rotation.h
TFT_Drivers/SSD1963_Rotation.h
+50
-0
TFT_eSPI.cpp
TFT_eSPI.cpp
+12
-18
TFT_eSPI.h
TFT_eSPI.h
+1
-1
User_Setup.h
User_Setup.h
+3
-0
User_Setup_Select.h
User_Setup_Select.h
+11
-2
library.json
library.json
+1
-1
library.properties
library.properties
+1
-1
No files found.
TFT_Drivers/SSD1963_Defines.h
0 → 100644
View file @
1c66d306
// Change the width and height if required (defined in portrait mode)
// or use the constructor to over-ride defaults
#if defined (SSD1963_480_DRIVER)
#define TFT_WIDTH 272
#define TFT_HEIGHT 480
#elif defined (SSD1963_800_DRIVER)
#define TFT_WIDTH 480
#define TFT_HEIGHT 800
#elif defined (SSD1963_800ALT_DRIVER)
#define TFT_WIDTH 480
#define TFT_HEIGHT 800
#endif
// Delay between some initialisation commands
#define TFT_INIT_DELAY 0x80 // Not used unless commandlist invoked
// Generic commands used by TFT_eSPI.cpp
#define TFT_NOP 0x00
#define TFT_SWRST 0x01
#define TFT_CASET 0x2A
#define TFT_PASET 0x2B
#define TFT_RAMWR 0x2C
#define TFT_RAMRD 0x2E
#define TFT_IDXRD 0xDD // ILI9341 only, indexed control register read
#define TFT_MADCTL 0x36
#define TFT_MAD_MY 0x80
#define TFT_MAD_MX 0x40
#define TFT_MAD_MV 0x20
#define TFT_MAD_ML 0x10
#define TFT_MAD_BGR 0x08
#define TFT_MAD_MH 0x04
#define TFT_MAD_RGB 0x00
#ifdef TFT_RGB_ORDER
#if (TFT_RGB_ORDER == 1)
#define TFT_MAD_COLOR_ORDER TFT_MAD_RGB
#else
#define TFT_MAD_COLOR_ORDER TFT_MAD_BGR
#endif
#else
#define TFT_MAD_COLOR_ORDER TFT_MAD_BGR
#endif
#define TFT_INVOFF 0x20
#define TFT_INVON 0x21
TFT_Drivers/SSD1963_Init.h
0 → 100644
View file @
1c66d306
#if defined (SSD1963_480_DRIVER)
writecommand
(
0xE2
);
//PLL multiplier, set PLL clock to 120M
writedata
(
0x23
);
//N=0x36 for 6.5M, 0x23 for 10M crystal
writedata
(
0x02
);
writedata
(
0x54
);
writecommand
(
0xE0
);
// PLL enable
writedata
(
0x01
);
delay
(
10
);
writecommand
(
0xE0
);
writedata
(
0x03
);
delay
(
10
);
writecommand
(
0x01
);
// software reset
delay
(
100
);
writecommand
(
0xE6
);
//PLL setting for PCLK, depends on resolution
writedata
(
0x01
);
writedata
(
0x1F
);
writedata
(
0xFF
);
writecommand
(
0xB0
);
//LCD SPECIFICATION
writedata
(
0x20
);
writedata
(
0x00
);
writedata
(
0x01
);
//Set HDP 479
writedata
(
0xDF
);
writedata
(
0x01
);
//Set VDP 271
writedata
(
0x0F
);
writedata
(
0x00
);
writecommand
(
0xB4
);
//HSYNC
writedata
(
0x02
);
//Set HT 531
writedata
(
0x13
);
writedata
(
0x00
);
//Set HPS 8
writedata
(
0x08
);
writedata
(
0x2B
);
//Set HPW 43
writedata
(
0x00
);
//Set LPS 2
writedata
(
0x02
);
writedata
(
0x00
);
writecommand
(
0xB6
);
//VSYNC
writedata
(
0x01
);
//Set VT 288
writedata
(
0x20
);
writedata
(
0x00
);
//Set VPS 4
writedata
(
0x04
);
writedata
(
0x0c
);
//Set VPW 12
writedata
(
0x00
);
//Set FPS 2
writedata
(
0x02
);
writecommand
(
0xBA
);
writedata
(
0x0F
);
//GPIO[3:0] out 1
writecommand
(
0xB8
);
writedata
(
0x07
);
//GPIO3=input, GPIO[2:0]=output
writedata
(
0x01
);
//GPIO0 normal
writecommand
(
0x36
);
//rotation
writedata
(
0x2A
);
writecommand
(
0xF0
);
//pixel data interface
writedata
(
0x03
);
delay
(
1
);
writecommand
(
0xB8
);
writedata
(
0x0f
);
//GPIO is controlled by host GPIO[3:0]=output GPIO[0]=1 LCD ON GPIO[0]=1 LCD OFF
writedata
(
0x01
);
//GPIO0 normal
writecommand
(
0xBA
);
writedata
(
0x01
);
//GPIO[0] out 1 --- LCD display on/off control PIN
writecommand
(
0x2A
);
writedata
(
0
);
writedata
(
0
);
writedata
((
271
&
0xFF00
)
>>
8
);
writedata
(
271
&
0xFF
);
writecommand
(
0x2B
);
writedata
(
0
);
writedata
(
0
);
writedata
((
479
&
0xFF00
)
>>
8
);
writedata
(
479
&
0xFF
);
writecommand
(
0x2C
);
writecommand
(
0x29
);
//display on
writecommand
(
0xBE
);
//set PWM for B/L
writedata
(
0x06
);
writedata
(
0xf0
);
writedata
(
0x01
);
writedata
(
0xf0
);
writedata
(
0x00
);
writedata
(
0x00
);
writecommand
(
0xd0
);
writedata
(
0x0d
);
writecommand
(
0x2C
);
#elif defined (SSD1963_800_DRIVER)
writecommand
(
0xE2
);
//PLL multiplier, set PLL clock to 120M
writedata
(
0x1E
);
//N=0x36 for 6.5M, 0x23 for 10M crystal
writedata
(
0x02
);
writedata
(
0x54
);
writecommand
(
0xE0
);
// PLL enable
writedata
(
0x01
);
delay
(
10
);
writecommand
(
0xE0
);
writedata
(
0x03
);
delay
(
10
);
writecommand
(
0x01
);
// software reset
delay
(
100
);
writecommand
(
0xE6
);
//PLL setting for PCLK, depends on resolution
writedata
(
0x03
);
writedata
(
0xFF
);
writedata
(
0xFF
);
writecommand
(
0xB0
);
//LCD SPECIFICATION
writedata
(
0x20
);
writedata
(
0x00
);
writedata
(
0x03
);
//Set HDP 799
writedata
(
0x1F
);
writedata
(
0x01
);
//Set VDP 479
writedata
(
0xDF
);
writedata
(
0x00
);
writecommand
(
0xB4
);
//HSYNC
writedata
(
0x03
);
//Set HT 928
writedata
(
0xA0
);
writedata
(
0x00
);
//Set HPS 46
writedata
(
0x2E
);
writedata
(
0x30
);
//Set HPW 48
writedata
(
0x00
);
//Set LPS 15
writedata
(
0x0F
);
writedata
(
0x00
);
writecommand
(
0xB6
);
//VSYNC
writedata
(
0x02
);
//Set VT 525
writedata
(
0x0D
);
writedata
(
0x00
);
//Set VPS 16
writedata
(
0x10
);
writedata
(
0x10
);
//Set VPW 16
writedata
(
0x00
);
//Set FPS 8
writedata
(
0x08
);
writecommand
(
0xBA
);
writedata
(
0x0F
);
//GPIO[3:0] out 1
writecommand
(
0xB8
);
writedata
(
0x07
);
//GPIO3=input, GPIO[2:0]=output
writedata
(
0x01
);
//GPIO0 normal
writecommand
(
0x36
);
//rotation
writedata
(
0x2A
);
writecommand
(
0xF0
);
//pixel data interface
writedata
(
0x03
);
delay
(
1
);
writecommand
(
0xB8
);
writedata
(
0x0f
);
//GPIO is controlled by host GPIO[3:0]=output GPIO[0]=1 LCD ON GPIO[0]=1 LCD OFF
writedata
(
0x01
);
//GPIO0 normal
writecommand
(
0xBA
);
writedata
(
0x01
);
//GPIO[0] out 1 --- LCD display on/off control PIN
writecommand
(
0x2A
);
writedata
(
0
);
writedata
(
0
);
writedata
((
479
&
0xFF00
)
>>
8
);
writedata
(
479
&
0xFF
);
writecommand
(
0x2B
);
writedata
(
0
);
writedata
(
0
);
writedata
((
799
&
0xFF00
)
>>
8
);
writedata
(
799
&
0xFF
);
writecommand
(
0x2C
);
writecommand
(
0x29
);
//display on
writecommand
(
0xBE
);
//set PWM for B/L
writedata
(
0x06
);
writedata
(
0xf0
);
writedata
(
0x01
);
writedata
(
0xf0
);
writedata
(
0x00
);
writedata
(
0x00
);
writecommand
(
0xd0
);
writedata
(
0x0d
);
writecommand
(
0x2C
);
#elif defined (SSD1963_800ALT_DRIVER)
writecommand
(
0xE2
);
//PLL multiplier, set PLL clock to 120M
writedata
(
0x23
);
//N=0x36 for 6.5M, 0x23 for 10M crystal
writedata
(
0x02
);
writedata
(
0x04
);
writecommand
(
0xE0
);
// PLL enable
writedata
(
0x01
);
delay
(
10
);
writecommand
(
0xE0
);
writedata
(
0x03
);
delay
(
10
);
writecommand
(
0x01
);
// software reset
delay
(
100
);
writecommand
(
0xE6
);
//PLL setting for PCLK, depends on resolution
writedata
(
0x04
);
writedata
(
0x93
);
writedata
(
0xE0
);
writecommand
(
0xB0
);
//LCD SPECIFICATION
writedata
(
0x00
);
// 0x24
writedata
(
0x00
);
writedata
(
0x03
);
//Set HDP 799
writedata
(
0x1F
);
writedata
(
0x01
);
//Set VDP 479
writedata
(
0xDF
);
writedata
(
0x00
);
writecommand
(
0xB4
);
//HSYNC
writedata
(
0x03
);
//Set HT 928
writedata
(
0xA0
);
writedata
(
0x00
);
//Set HPS 46
writedata
(
0x2E
);
writedata
(
0x30
);
//Set HPW 48
writedata
(
0x00
);
//Set LPS 15
writedata
(
0x0F
);
writedata
(
0x00
);
writecommand
(
0xB6
);
//VSYNC
writedata
(
0x02
);
//Set VT 525
writedata
(
0x0D
);
writedata
(
0x00
);
//Set VPS 16
writedata
(
0x10
);
writedata
(
0x10
);
//Set VPW 16
writedata
(
0x00
);
//Set FPS 8
writedata
(
0x08
);
writecommand
(
0xBA
);
writedata
(
0x05
);
//GPIO[3:0] out 1
writecommand
(
0xB8
);
writedata
(
0x07
);
//GPIO3=input, GPIO[2:0]=output
writedata
(
0x01
);
//GPIO0 normal
writecommand
(
0x36
);
//rotation
writedata
(
0x22
);
// -- Set to 0x21 to rotate 180 degrees
writecommand
(
0xF0
);
//pixel data interface
writedata
(
0x03
);
delay
(
10
);
writecommand
(
0x2A
);
writedata
(
0
);
writedata
(
0
);
writedata
((
479
&
0xFF00
)
>>
8
);
writedata
(
479
&
0xFF
);
writecommand
(
0x2B
);
writedata
(
0
);
writedata
(
0
);
writedata
((
799
&
0xFF00
)
>>
8
);
writedata
(
799
&
0xFF
);
writecommand
(
0x2C
);
writecommand
(
0x29
);
//display on
writecommand
(
0xBE
);
//set PWM for B/L
writedata
(
0x06
);
writedata
(
0xF0
);
writedata
(
0x01
);
writedata
(
0xF0
);
writedata
(
0x00
);
writedata
(
0x00
);
writecommand
(
0xD0
);
writedata
(
0x0D
);
writecommand
(
0x2C
);
#endif
\ No newline at end of file
TFT_Drivers/SSD1963_Rotation.h
0 → 100644
View file @
1c66d306
// This is the command sequence that rotates the SSD1963 driver coordinate frame
rotation
=
m
%
8
;
// Limit the range of values to 0-7
writecommand
(
TFT_MADCTL
);
switch
(
rotation
)
{
case
0
:
writedata
(
TFT_MAD_MX
|
TFT_MAD_COLOR_ORDER
);
_width
=
_init_width
;
_height
=
_init_height
;
break
;
case
1
:
writedata
(
TFT_MAD_MV
|
TFT_MAD_COLOR_ORDER
);
_width
=
_init_height
;
_height
=
_init_width
;
break
;
case
2
:
writedata
(
TFT_MAD_MY
|
TFT_MAD_COLOR_ORDER
);
_width
=
_init_width
;
_height
=
_init_height
;
break
;
case
3
:
writedata
(
TFT_MAD_MX
|
TFT_MAD_MY
|
TFT_MAD_MV
|
TFT_MAD_COLOR_ORDER
);
_width
=
_init_height
;
_height
=
_init_width
;
break
;
// These next rotations are for bottom up BMP drawing
case
4
:
writedata
(
TFT_MAD_MX
|
TFT_MAD_MY
|
TFT_MAD_COLOR_ORDER
);
_width
=
_init_width
;
_height
=
_init_height
;
break
;
case
5
:
writedata
(
TFT_MAD_MV
|
TFT_MAD_MX
|
TFT_MAD_COLOR_ORDER
);
_width
=
_init_height
;
_height
=
_init_width
;
break
;
case
6
:
writedata
(
TFT_MAD_COLOR_ORDER
);
_width
=
_init_width
;
_height
=
_init_height
;
break
;
case
7
:
writedata
(
TFT_MAD_MY
|
TFT_MAD_MV
|
TFT_MAD_COLOR_ORDER
);
_width
=
_init_height
;
_height
=
_init_width
;
break
;
}
TFT_eSPI.cpp
View file @
1c66d306
...
...
@@ -395,6 +395,15 @@ void TFT_eSPI::init(uint8_t tc)
#elif defined (ST7789_2_DRIVER)
#include "TFT_Drivers/ST7789_2_Init.h"
#elif defined (SSD1963_480_DRIVER)
#include "TFT_Drivers/SSD1963_Init.h"
#elif defined (SSD1963_800_DRIVER)
#include "TFT_Drivers/SSD1963_Init.h"
#elif defined (SSD1963_800ALT_DRIVER)
#include "TFT_Drivers/SSD1963_Init.h"
#endif
#ifdef TFT_INVERSION_ON
...
...
@@ -2611,6 +2620,9 @@ void TFT_eSPI::setWindow(int32_t x0, int32_t y0, int32_t x1, int32_t y1)
{
//begin_tft_write(); // Must be called before setWindow
addr_row
=
0xFFFF
;
addr_col
=
0xFFFF
;
#ifdef CGRAM_OFFSET
x0
+=
colstart
;
x1
+=
colstart
;
...
...
@@ -2618,28 +2630,10 @@ void TFT_eSPI::setWindow(int32_t x0, int32_t y0, int32_t x1, int32_t y1)
y1
+=
rowstart
;
#endif
#ifdef MULTI_TFT_SUPPORT
// No optimisation to permit multiple screens
DC_C
;
tft_Write_8
(
TFT_CASET
);
DC_D
;
tft_Write_32C
(
x0
,
x1
);
DC_C
;
tft_Write_8
(
TFT_PASET
);
DC_D
;
tft_Write_32C
(
y0
,
y1
);
#else
// No need to send x if it has not changed (speeds things up)
//if (addr_col != (x0<<16 | x1)) {
DC_C
;
tft_Write_8
(
TFT_CASET
);
DC_D
;
tft_Write_32C
(
x0
,
x1
);
// addr_col = (x0<<16 | x1);
//}
// No need to send y if it has not changed (speeds things up)
//if (addr_row != (y0<<16 | y1)) {
DC_C
;
tft_Write_8
(
TFT_PASET
);
DC_D
;
tft_Write_32C
(
y0
,
y1
);
// addr_row = (y0<<16 | y1);
//}
#endif
DC_C
;
tft_Write_8
(
TFT_RAMWR
);
DC_D
;
...
...
TFT_eSPI.h
View file @
1c66d306
...
...
@@ -16,7 +16,7 @@
#ifndef _TFT_eSPIH_
#define _TFT_eSPIH_
#define TFT_ESPI_VERSION "2.2.1
7
"
#define TFT_ESPI_VERSION "2.2.1
8
"
/***************************************************************************************
** Section 1: Load required header files
...
...
User_Setup.h
View file @
1c66d306
...
...
@@ -50,6 +50,9 @@
//#define R61581_DRIVER
//#define RM68140_DRIVER
//#define ST7796_DRIVER
//#define SSD1963_480_DRIVER // Untested
//#define SSD1963_800_DRIVER // Untested
//#define SSD1963_800ALT_DRIVER // Untested
// Some displays support SPI reads via the MISO pin, other displays have a single
// bi-directional SDA pin and the library will try to read this via the MOSI line.
...
...
User_Setup_Select.h
View file @
1c66d306
...
...
@@ -59,7 +59,7 @@
//#include <User_Setups/Setup29_ILI9341_STM32.h> // Setup for Nucleo board
//#include <User_Setups/Setup30_ILI9341_Parallel_STM32.h> // Setup for Nucleo board and parallel display
//#include <User_Setups/Setup31_ST7796_Parallel_STM32.h> // Setup for Nucleo board and parallel display
//#include <User_Setups/Setup32_ILI9341_STM32F103.h> // Setup for "Blue Pill"
//#include <User_Setups/Setup32_ILI9341_STM32F103.h> // Setup for "Blue
/Black
Pill"
//#include <User_Setups/Setup33_RPi_ILI9486_STM32.h> // Setup for Nucleo board
...
...
@@ -154,8 +154,17 @@
#elif defined (RM68140_DRIVER)
#include "TFT_Drivers/RM68140_Defines.h"
#define TFT_DRIVER 0x6814
#elif defined (SSD1963_480_DRIVER)
#include "TFT_Drivers/SSD1963_Defines.h"
#define TFT_DRIVER 0x1963
#elif defined (SSD1963_800_DRIVER)
#include "TFT_Drivers/SSD1963_Defines.h"
#define TFT_DRIVER 0x1963
#elif defined (SSD1963_800ALT_DRIVER)
#include "TFT_Drivers/SSD1963_Defines.h"
#define TFT_DRIVER 0x1963
// <<<<<<<<<<<<<<<<<<<<<<<< ADD NEW DRIVER HERE
// XYZZY_init.h and XYZZY_rotation.h must also be added in TFT_eSPI.c
// XYZZY_init.h and XYZZY_rotation.h must also be added in TFT_eSPI.c
pp
#elif defined (XYZZY_DRIVER)
#include "TFT_Drivers/XYZZY_Defines.h"
#define TFT_DRIVER 0x0000
...
...
library.json
View file @
1c66d306
{
"name"
:
"TFT_eSPI"
,
"version"
:
"2.2.1
7
"
,
"version"
:
"2.2.1
8
"
,
"keywords"
:
"Arduino, tft, ePaper, display, STM32, ESP8266, NodeMCU, ESP32, M5Stack, ILI9341, ST7735, ILI9163, S6D02A1, ILI9486, ST7789, RM68140"
,
"description"
:
"A TFT and ePaper SPI graphics library with optimisation for ESP8266, ESP32 and STM32"
,
"repository"
:
...
...
library.properties
View file @
1c66d306
name
=
TFT_eSPI
version
=
2.2.1
7
version
=
2.2.1
8
author
=
Bodmer
maintainer
=
Bodmer
sentence
=
TFT graphics library for Arduino processors with performance optimisation for STM32, ESP8266 and ESP32
...
...
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