stm32: Include .ARM section in firmware for C++ exception handling.

Support for C++ was added in 97960dc7 but
that commit didn't include the C++ exception handling table in the binary
firmware image.  This commit fixes that.
Signed-off-by: Damien George <damien@micropython.org>

ports/stm32/Makefile

@@ -643,7 +643,7 @@ TEXT0_ADDR ?= 0x08000000
 ifeq ($(TEXT1_ADDR),)
 # No TEXT1_ADDR given so put all firmware at TEXT0_ADDR location
 
-TEXT0_SECTIONS ?= .isr_vector .text .data
+TEXT0_SECTIONS ?= .isr_vector .text .data .ARM
 
 deploy-stlink: $(BUILD)/firmware.bin
 	$(call RUN_STLINK,$^,$(TEXT0_ADDR))
@@ -661,7 +661,7 @@ else
 # TEXT0_ADDR and TEXT1_ADDR are specified so split firmware between these locations
 
 TEXT0_SECTIONS ?= .isr_vector
-TEXT1_SECTIONS ?= .text .data
+TEXT1_SECTIONS ?= .text .data .ARM
 
 deploy-stlink: $(BUILD)/firmware0.bin $(BUILD)/firmware1.bin
 	$(call RUN_STLINK,$(word 1,$^),$(TEXT0_ADDR))

ports/stm32/boards/PYBD_SF2/mpconfigboard.mk

@@ -6,7 +6,7 @@ AF_FILE = boards/stm32f722_af.csv
 LD_FILES = boards/PYBD_SF2/f722_qspi.ld
 TEXT0_ADDR = 0x08008000
 TEXT1_ADDR = 0x90000000
-TEXT0_SECTIONS = .isr_vector .text .data
+TEXT0_SECTIONS = .isr_vector .text .data .ARM
 TEXT1_SECTIONS = .text_ext
 
 # MicroPython settings

ports/stm32/boards/PYBD_SF3/mpconfigboard.mk

@@ -6,7 +6,7 @@ AF_FILE = boards/stm32f722_af.csv
 LD_FILES = boards/PYBD_SF2/f722_qspi.ld
 TEXT0_ADDR = 0x08008000
 TEXT1_ADDR = 0x90000000
-TEXT0_SECTIONS = .isr_vector .text .data
+TEXT0_SECTIONS = .isr_vector .text .data .ARM
 TEXT1_SECTIONS = .text_ext
 
 # MicroPython settings

ports/stm32/boards/STM32F769DISC/mpconfigboard.mk

@@ -22,7 +22,7 @@ ifeq ($(USE_QSPI_XIP),1)
 LD_FILES = boards/STM32F769DISC/f769_qspi.ld
 TEXT0_ADDR = 0x08020000
 TEXT1_ADDR = 0x90000000
-TEXT0_SECTIONS = .isr_vector .text .data
+TEXT0_SECTIONS = .isr_vector .text .data .ARM
 TEXT1_SECTIONS = .text_qspi
 
 else