add new board cv1800b_sophpi_duo_sd

Change-Id: If545300e0bb5286d56a53f125924ddedae62180d

build/boards/cv180x/cv1800b_sophpi_duo_sd/config.json

+{
+    "ddr_cfg_list": [
+        "ddr2_1333_x16"
+    ],
+    "board_information": "C906B + SD + QFN SIP 64MB"
+}

build/boards/cv180x/cv1800b_sophpi_duo_sd/cv1800b_sophpi_duo_sd_defconfig

+CONFIG_CHIP_cv1800b=y
+CONFIG_BOARD_sophpi_duo_sd=y
+CONFIG_DDR_CFG_ddr2_1333_x16=y
+CONFIG_ARCH="riscv"
+CONFIG_CROSS_COMPILE="riscv64-unknown-linux-musl-"
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_KERNEL_ENTRY_HACK=y
+CONFIG_KERNEL_ENTRY_HACK_ADDR="0x80200000"
+CONFIG_TOOLCHAIN_MUSL_RISCV64=y
+CONFIG_FLASH_SIZE_SHRINK=y
+CONFIG_NO_FB=y
+CONFIG_NO_TP=y
+CONFIG_DDR_64MB_SIZE=y
+CONFIG_BOOT_IMAGE_SINGLE_DTB=y
+CONFIG_STORAGE_TYPE_sd=y
+CONFIG_SENSOR_TUNING_PARAM_cv181x_src_gcore_gc4653=y
+CONFIG_SENSOR_GCORE_GC4653=y
+CONFIG_SENSOR_SMS_SC3335=y
+CONFIG_SENSOR_SMS_SC500AI=y
+CONFIG_SENSOR_SONY_IMX307=y
+CONFIG_SENSOR_SONY_IMX307_2L=y
+CONFIG_SENSOR_SONY_IMX307_SLAVE=y
+CONFIG_SENSOR_SONY_IMX327=y
+CONFIG_SENSOR_SONY_IMX327_2L=y
+CONFIG_SENSOR_SONY_IMX327_SLAVE=y
+CONFIG_SENSOR_OV_OS04C10=y
+CONFIG_UBOOT_2021_10=y
+CONFIG_KERNEL_SRC_5.10=y
+CONFIG_KERNEL_LZMA=y
+CONFIG_SKIP_RAMDISK=y
+# CONFIG_ROOTFS_OVERLAYFS is not set
+# CONFIG_TARGET_PACKAGE_CVITRACER is not set
+# CONFIG_TARGET_PACKAGE_GDBSERVER is not set
+# CONFIG_TARGET_PACKAGE_LIBCRYPTO is not set
+# CONFIG_TARGET_PACKAGE_LIBZ is not set
+# CONFIG_TARGET_PACKAGE_OTASERVER is not set
+# CONFIG_TARGET_PACKAGE_RSYSLOG is not set
+CONFIG_TARGET_PACKAGE_CRONTABS=y
+# CONFIG_TARGET_PACKAGE_GATORD is not set
+CONFIG_TARGET_PACKAGE_WIFI=y
+CONFIG_TARGET_PACKAGE_DROPBEAR=y
+CONFIG_TARGET_PACKAGE_NTP=y
+CONFIG_ENABLE_FREERTOS=y
+CONFIG_ENABLE_RTOS_DUMP_PRINT=y
+CONFIG_DUMP_PRINT_SZ_IDX=17
+CONFIG_USE_4K_ERASE_SIZE_FOR_JFFS2=y
+CONFIG_USB_OSDRV_CVITEK_GADGET=n
+CONFIG_BUILD_FOR_DEBUG=n

build/boards/cv180x/cv1800b_sophpi_duo_sd/dts_riscv/cv1800b_sophpi_duo_sd.dts

+/dts-v1/;
+#include "cv180x_base_riscv.dtsi"
+#include "cv180x_asic_qfn.dtsi"
+#include "cv180x_asic_sd.dtsi"
+#include "cv180x_default_memmap.dtsi"
+
+&mipi_rx{
+	snsr-reset = <&portc 8 GPIO_ACTIVE_LOW>, <&portc 8 GPIO_ACTIVE_LOW>, <&portc 8 GPIO_ACTIVE_LOW>;
+};
+
+/ {
+
+};
+

build/boards/cv180x/cv1800b_sophpi_duo_sd/linux/cvitek_cv1800b_sophpy_duo_sd_defconfig

+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_NO_HZ_IDLE=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PREEMPT=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=15
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+# CONFIG_SYSFS_SYSCALL is not set
+# CONFIG_FHANDLE is not set
+# CONFIG_BUG is not set
+# CONFIG_BASE_FULL is not set
+# CONFIG_EPOLL is not set
+# CONFIG_SIGNALFD is not set
+# CONFIG_TIMERFD is not set
+# CONFIG_AIO is not set
+# CONFIG_IO_URING is not set
+# CONFIG_ADVISE_SYSCALLS is not set
+# CONFIG_KALLSYMS is not set
+CONFIG_EMBEDDED=y
+# CONFIG_SLUB_DEBUG is not set
+CONFIG_FORCE_MAX_ZONEORDER=10
+CONFIG_ARCH_CVITEK=y
+CONFIG_SOC_THEAD=y
+# CONFIG_RISCV_SWIOTLB is not set
+CONFIG_VECTOR=y
+CONFIG_VECTOR_0_7=y
+# CONFIG_COMPAT is not set
+CONFIG_ARCH_CV180X=y
+CONFIG_ARCH_CVITEK_CHIP="cv180x"
+CONFIG_ARCH_CV180X_ASIC=y
+CONFIG_COMPAT_32BIT_TIME=y
+# CONFIG_STRICT_KERNEL_RWX is not set
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_MQ_IOSCHED_DEADLINE is not set
+# CONFIG_MQ_IOSCHED_KYBER is not set
+# CONFIG_COREDUMP is not set
+CONFIG_CMA=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+CONFIG_CFG80211=y
+CONFIG_RFKILL=y
+CONFIG_UEVENT_HELPER=y
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_ALLOW_DEV_COREDUMP is not set
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_OF_PARTS is not set
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_SPI_CVI_SPIF=y
+CONFIG_NETDEVICES=y
+# CONFIG_NET_CORE is not set
+# CONFIG_NET_VENDOR_ALACRITECH is not set
+# CONFIG_NET_VENDOR_AMAZON is not set
+# CONFIG_NET_VENDOR_AQUANTIA is not set
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_VENDOR_AURORA is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CADENCE is not set
+# CONFIG_NET_VENDOR_CAVIUM is not set
+# CONFIG_NET_VENDOR_CORTINA is not set
+# CONFIG_NET_VENDOR_EZCHIP is not set
+# CONFIG_NET_VENDOR_HUAWEI is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_MICROSEMI is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_NETRONOME is not set
+# CONFIG_NET_VENDOR_NI is not set
+# CONFIG_NET_VENDOR_QUALCOMM is not set
+# CONFIG_NET_VENDOR_RENESAS is not set
+# CONFIG_NET_VENDOR_ROCKER is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SOLARFLARE is not set
+# CONFIG_NET_VENDOR_SOCIONEXT is not set
+CONFIG_STMMAC_ETH=y
+# CONFIG_DWMAC_GENERIC is not set
+# CONFIG_NET_VENDOR_SYNOPSYS is not set
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+# CONFIG_USB_NET_DRIVERS is not set
+# CONFIG_WLAN_VENDOR_ADMTEK is not set
+# CONFIG_WLAN_VENDOR_ATH is not set
+# CONFIG_WLAN_VENDOR_ATMEL is not set
+# CONFIG_WLAN_VENDOR_BROADCOM is not set
+# CONFIG_WLAN_VENDOR_CISCO is not set
+# CONFIG_WLAN_VENDOR_INTEL is not set
+# CONFIG_WLAN_VENDOR_INTERSIL is not set
+# CONFIG_WLAN_VENDOR_MARVELL is not set
+# CONFIG_WLAN_VENDOR_MEDIATEK is not set
+# CONFIG_WLAN_VENDOR_MICROCHIP is not set
+# CONFIG_WLAN_VENDOR_RALINK is not set
+# CONFIG_WLAN_VENDOR_RSI is not set
+# CONFIG_WLAN_VENDOR_ST is not set
+# CONFIG_WLAN_VENDOR_TI is not set
+# CONFIG_WLAN_VENDOR_ZYDAS is not set
+# CONFIG_WLAN_VENDOR_QUANTENNA is not set
+# CONFIG_INPUT is not set
+# CONFIG_SERIO is not set
+# CONFIG_VT is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=5
+CONFIG_SERIAL_8250_RUNTIME_UARTS=5
+CONFIG_SERIAL_8250_DW=y
+CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
+CONFIG_HW_RANDOM=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX=y
+CONFIG_I2C_DESIGNWARE_PLATFORM=y
+CONFIG_SPI=y
+# CONFIG_PTP_1588_CLOCK is not set
+CONFIG_PINCTRL=y
+CONFIG_CVITEK_PINCTRL_CV1835=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_DWAPB=y
+CONFIG_POWER_RESET=y
+CONFIG_THERMAL=y
+CONFIG_THERMAL_NETLINK=y
+CONFIG_THERMAL_WRITABLE_TRIPS=y
+CONFIG_THERMAL_EMULATION=y
+CONFIG_CV180X_THERMAL=m
+CONFIG_WATCHDOG=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+# CONFIG_SND_PCM_TIMER is not set
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_PROC_FS is not set
+# CONFIG_SND_DRIVERS is not set
+CONFIG_SND_HDA_PREALLOC_SIZE=1
+# CONFIG_SND_SPI is not set
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_CV182XA_CV182XAADC=y
+CONFIG_SND_SOC_CV182XA_CV182XADAC=y
+CONFIG_SND_CV1835_I2S=y
+CONFIG_SND_SOC_CV182XAADC=y
+CONFIG_SND_SOC_CV182XADAC=y
+CONFIG_SND_SOC_CV1835_USE_AUDIO_PLL=y
+CONFIG_CV1835_I2S_SUBSYS=y
+CONFIG_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_LIBCOMPOSITE=y
+CONFIG_USB_F_ACM=y
+CONFIG_USB_U_SERIAL=y
+CONFIG_USB_U_ETHER=y
+CONFIG_USB_U_AUDIO=y
+CONFIG_USB_F_SERIAL=y
+CONFIG_USB_F_ECM=y
+CONFIG_USB_F_EEM=y
+CONFIG_USB_F_RNDIS=y
+CONFIG_USB_F_MASS_STORAGE=y
+CONFIG_USB_F_FS=y
+CONFIG_USB_F_UAC1=y
+CONFIG_USB_F_UVC=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_SERIAL=y
+CONFIG_USB_CONFIGFS_ACM=y
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_CVI=y
+CONFIG_RTC_CLASS=y
+CONFIG_DMADEVICES=y
+CONFIG_DW_DMAC_CVITEK=y
+# CONFIG_VIRTIO_MENU is not set
+CONFIG_STAGING=y
+CONFIG_ION=y
+CONFIG_ION_SYSTEM_HEAP=y
+CONFIG_ION_CARVEOUT_HEAP=y
+CONFIG_ION_CMA_HEAP=y
+# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_CV1835_SYSDMA_REMAP=y
+CONFIG_PWM=y
+CONFIG_SIFIVE_PLIC=y
+CONFIG_ANDROID=y
+# CONFIG_MANDATORY_FILE_LOCKING is not set
+CONFIG_VFAT_FS=y
+# CONFIG_PROC_PAGE_MONITOR is not set
+CONFIG_TMPFS=y
+# CONFIG_EFIVAR_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_WBUF_VERIFY=y
+CONFIG_SQUASHFS=y
+# CONFIG_SQUASHFS_ZLIB is not set
+CONFIG_SQUASHFS_XZ=y
+CONFIG_NFS_FS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_CRYPTO_HW is not set
+# CONFIG_XZ_DEC_X86 is not set
+# CONFIG_XZ_DEC_POWERPC is not set
+# CONFIG_XZ_DEC_IA64 is not set
+# CONFIG_XZ_DEC_ARMTHUMB is not set
+# CONFIG_XZ_DEC_SPARC is not set
+CONFIG_DMA_CMA=y
+CONFIG_CMA_SIZE_MBYTES=0
+CONFIG_PRINTK_TIME=y
+CONFIG_DYNAMIC_DEBUG=y
+# CONFIG_ENABLE_MUST_CHECK is not set
+# CONFIG_FRAME_POINTER is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_DEBUG_MISC is not set
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_RCU_TRACE is not set
+# CONFIG_FTRACE is not set
+# CONFIG_RUNTIME_TESTING_MENU is not set

build/boards/cv180x/cv1800b_sophpi_duo_sd/memmap.py

+SIZE_1M = 0x100000
+SIZE_1K = 1024
+
+
+# Only attributes in class MemoryMap are generated to .h
+class MemoryMap:
+    # No prefix "CVIMMAP_" for the items in _no_prefix[]
+    _no_prefix = [
+        "CONFIG_SYS_TEXT_BASE"  # u-boot's CONFIG_SYS_TEXT_BASE is used without CPP.
+    ]
+
+    DRAM_BASE = 0x80000000
+    DRAM_SIZE = 64 * SIZE_1M
+
+    # ==============
+    # C906L FreeRTOS
+    # ==============
+    FREERTOS_SIZE = 768 * SIZE_1K
+    # FreeRTOS is at the end of DRAM
+    FREERTOS_ADDR = DRAM_BASE + DRAM_SIZE - FREERTOS_SIZE
+    FSBL_C906L_START_ADDR = FREERTOS_ADDR
+
+    # ==============================
+    # OpenSBI | arm-trusted-firmware
+    # ==============================
+    # Monitor is at the begining of DRAM
+    MONITOR_ADDR = DRAM_BASE
+
+    ATF_SIZE = 512 * SIZE_1K
+    OPENSBI_SIZE = 512 * SIZE_1K
+    OPENSBI_FDT_ADDR = MONITOR_ADDR + OPENSBI_SIZE
+
+    # =========================
+    # memory@DRAM_BASE in .dts.
+    # =========================
+    # Ignore the area of FreeRTOS in u-boot and kernel
+    KERNEL_MEMORY_ADDR = DRAM_BASE
+    KERNEL_MEMORY_SIZE = DRAM_SIZE - FREERTOS_SIZE
+
+    # =================
+    # Multimedia buffer. Used by u-boot/kernel/FreeRTOS
+    # =================
+    ION_SIZE = 26.80078125 * SIZE_1M
+    H26X_BITSTREAM_SIZE = 0 * SIZE_1M
+    H26X_ENC_BUFF_SIZE = 0
+    ISP_MEM_BASE_SIZE = 0 * SIZE_1M
+    BOOTLOGO_SIZE = 0 * SIZE_1M
+    FREERTOS_RESERVED_ION_SIZE = H26X_BITSTREAM_SIZE + H26X_ENC_BUFF_SIZE + ISP_MEM_BASE_SIZE + BOOTLOGO_SIZE
+
+    # ION after FreeRTOS
+    ION_ADDR = FREERTOS_ADDR - ION_SIZE
+
+    # Buffers of the fast image are inside the ION buffer
+    H26X_BITSTREAM_ADDR = ION_ADDR
+    H26X_ENC_BUFF_ADDR = H26X_BITSTREAM_ADDR + H26X_BITSTREAM_SIZE
+    ISP_MEM_BASE_ADDR = H26X_ENC_BUFF_ADDR + H26X_ENC_BUFF_SIZE
+
+    # Boot logo is after ISP buffer and inside the ION buffer
+    BOOTLOGO_ADDR = ISP_MEM_BASE_ADDR + ISP_MEM_BASE_SIZE
+
+    assert BOOTLOGO_ADDR + BOOTLOGO_SIZE <= ION_ADDR + ION_SIZE
+
+    # ===================
+    # FSBL and u-boot-2021
+    # ===================
+    CVI_UPDATE_HEADER_SIZE = SIZE_1K
+    UIMAG_SIZE = 15 * SIZE_1M
+
+    # kernel image loading buffer
+    UIMAG_ADDR = DRAM_BASE + 20 * SIZE_1M
+    CVI_UPDATE_HEADER_ADDR = UIMAG_ADDR - CVI_UPDATE_HEADER_SIZE
+
+    # FSBL decompress buffer
+    FSBL_UNZIP_ADDR = UIMAG_ADDR
+    FSBL_UNZIP_SIZE = UIMAG_SIZE
+
+    assert UIMAG_ADDR + UIMAG_SIZE <= ION_ADDR
+
+    # u-boot's run address and entry point
+    CONFIG_SYS_TEXT_BASE = DRAM_BASE + 2 * SIZE_1M
+    # u-boot's init stack point is only used before board_init_f()
+    CONFIG_SYS_INIT_SP_ADDR = UIMAG_ADDR + UIMAG_SIZE

build/boards/cv180x/cv1800b_sophpi_duo_sd/partition/partition_sd.xml

+<physical_partition type="sd">
+    <partition label="BOOT" size_in_kb="80960" readonly="false" file="boot.sd"/>
+    <partition label="ROOTFS" size_in_kb="204800" readonly="false" file="rootfs.sd" />
+    <partition label="DATA"  size_in_kb="512000" readonly="false" file="data.sd" mountpoint="/mnt/data" type="ext4" />
+</physical_partition>

build/boards/cv180x/cv1800b_sophpi_duo_sd/partition/partition_sd_rls.xml

+<physical_partition type="sd">
+    <partition label="BOOT" size_in_kb="80960" readonly="false" file="boot.sd"/>
+    <partition label="ROOTFS" size_in_kb="204800" readonly="false" file="rootfs.sd" />
+    <partition label="DATA"  size_in_kb="512000" readonly="false" file="data.sd" mountpoint="/mnt/data" type="ext4" />
+</physical_partition>

build/boards/cv180x/cv1800b_sophpi_duo_sd/rootfs_script/clean_rootfs.sh

+#!/bin/bash
+
+SYSTEM_DIR=$1
+rm -rf $SYSTEM_DIR/mnt/system/usr
+rm -rf $SYSTEM_DIR/mnt/system/lib
+
+rm -rf $SYSTEM_DIR/etc/init.d/S01syslogd
+rm -rf $SYSTEM_DIR/etc/init.d/S02klogd
+rm -rf $SYSTEM_DIR/etc/init.d/S02sysctl
+rm -rf $SYSTEM_DIR/etc/init.d/S20urandom
+rm -rf $SYSTEM_DIR/etc/init.d/S40network
+rm -rf $SYSTEM_DIR/etc/init.d/S23ntp
+
+rm -rf $SYSTEM_DIR/bin/ntpd
+rm -rf $SYSTEM_DIR/mnt/cfg/secure.img
+
+#del cv181x_mipi_tx.ko
+rm -rf $SYSTEM_DIR/mnt/system/ko/cv181x_mipi_tx.ko
+sed -i "/cv181x_mipi_tx.ko/d" $SYSTEM_DIR/mnt/system/ko/loadsystemko.sh
+
+if [ $BUILD_FOR_DEBUG != "y" ]
+then
+#del dmesg cmd if CONFIG_PRINTK=n
+#sed -i "/dmesg/d" $SYSTEM_DIR/mnt/system/ko/loadsystemko.sh
+
+#del debugfs node
+sed -i "/debugfs/d" $SYSTEM_DIR/etc/fstab
+fi
+
+du -sh $SYSTEM_DIR/* |sort -rh

build/boards/cv180x/cv1800b_sophpi_duo_sd/u-boot/cvi_board_init.c

+int cvi_board_init(void)
+{
+#if defined(CV180X_QFN_88_PIN)
+	PINMUX_CONFIG(PAD_MIPI_TXP1, IIC2_SCL);
+	PINMUX_CONFIG(PAD_MIPI_TXM1, IIC2_SDA);
+	PINMUX_CONFIG(PAD_MIPI_TXP0, XGPIOC_13);
+	PINMUX_CONFIG(PAD_MIPI_TXM0, CAM_MCLK1);
+#elif defined(CV180X_QFN_88_PIN_38)
+	//I2C2
+	PINMUX_CONFIG(PAD_MIPI_TXP1, IIC2_SCL);
+	PINMUX_CONFIG(PAD_MIPI_TXM1, IIC2_SDA);
+	//CAM_RST0
+	PINMUX_CONFIG(PAD_MIPI_TXP2, XGPIOC_17);
+	PINMUX_CONFIG(PAD_MIPI_TXM2, XGPIOC_16);
+	//CAM_MCLK0
+	PINMUX_CONFIG(PAD_MIPI_TXP0, CAM_MCLK0);
+	PINMUX_CONFIG(PAD_MIPI_TXM0, XGPIOC_12);
+	//IRCUT
+	//PINMUX_CONFIG(SD1_D2, PWR_GPIO19);
+	//PINMUX_CONFIG(SD1_D3, PWR_GPIO18);
+
+#elif defined(CV180X_QFN_68_PIN)
+	PINMUX_CONFIG(PAD_MIPIRX1P, IIC1_SDA);
+	PINMUX_CONFIG(PAD_MIPIRX0N, IIC1_SCL);
+	PINMUX_CONFIG(PAD_MIPIRX1N, XGPIOC_8);
+	PINMUX_CONFIG(PAD_MIPIRX0P, CAM_MCLK0);
+	//IRCUT
+	//PINMUX_CONFIG(SD1_D2, PWR_GPIO19);
+	//PINMUX_CONFIG(SD1_D3, PWR_GPIO18);
+
+#endif
+
+	PINMUX_CONFIG(PAD_MIPIRX0P, CAM_MCLK0); // MCLK0
+	PINMUX_CONFIG(PAD_MIPIRX1P, IIC1_SDA); // I2C 2
+	PINMUX_CONFIG(PAD_MIPIRX0N, IIC1_SCL);
+
+	return 0;
+}

build/boards/cv180x/cv1800b_sophpi_duo_sd/u-boot/cvitek.h

+/*
+ *VO control GPIOs
+ */
+#define VO_GPIO_RESET_PORT		portb
+#define VO_GPIO_RESET_INDEX		5
+#define VO_GPIO_RESET_ACTIVE	GPIO_ACTIVE_LOW
+#define VO_GPIO_PWM_PORT		portb
+#define VO_GPIO_PWM_INDEX		4
+#define VO_GPIO_PWM_ACTIVE		GPIO_ACTIVE_HIGH
+#define VO_GPIO_POWER_CT_PORT	portb
+#define VO_GPIO_POWER_CT_INDEX	3
+#define VO_GPIO_POWER_CT_ACTIVE	GPIO_ACTIVE_HIGH
+

build/boards/cv180x/cv1800b_sophpi_duo_sd/u-boot/cvitek_cv1800b_sophpi_duo_sd_defconfig

+CONFIG_RISCV=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEFAULT_DEVICE_TREE="cv180x_asic"
+CONFIG_IDENT_STRING="cvitek_cv180x"
+CONFIG_ARCH_RV64I=y
+CONFIG_RISCV_SMODE=y
+CONFIG_TARGET_CVITEK_CV180X=y
+CONFIG_CVITEK_SPI_FLASH=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_BOOTDELAY=1
+CONFIG_SYS_PROMPT="cv180x_c906# "
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_LZMADEC is not set
+# CONFIG_CMD_UNLZ4 is not set
+# CONFIG_CMD_UNZIP is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_ITEST is not set
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_CVI_SD_UPDATE=y
+# CONFIG_ISO_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_CVITEK=y
+CONFIG_MTD=y
+# CONFIG_PHY_SMSC is not set
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY_CVITEK_CV182XA=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_LZ4=y
+CONFIG_LZMA=y
+# CONFIG_TOOLS_LIBCRYPTO is not set
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+# CONFIG_ENV_SUPPORT is not set 
+# CONFIG_ENV_OVERWRITE is not set 
+CONFIG_ENV_IS_NOWHERE=y

build/boards/cv180x/cv1800b_sophpi_duo_sd/u-boot/cvitek_cv1800b_sophpi_duo_sd_rls_defconfig

+CONFIG_RISCV=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEFAULT_DEVICE_TREE="cv180x_asic"
+CONFIG_IDENT_STRING="cvitek_cv180x"
+CONFIG_ARCH_RV64I=y
+CONFIG_RISCV_SMODE=y
+CONFIG_TARGET_CVITEK_CV180X=y
+# CONFIG_CVITEK_SPI_FLASH is not set 
+CONFIG_FIT=y
+# CONFIG_FIT_PRINT is not set
+# CONFIG_LEGACY_IMAGE_FORMAT is not set
+# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_BOOTDELAY=1
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="run distro_bootcmd"
+CONFIG_HUSH_PARSER=y
+# CONFIG_CMDLINE_EDITING is not set
+# CONFIG_AUTO_COMPLETE is not set
+# CONFIG_SYS_LONGHELP is not set
+CONFIG_SYS_PROMPT="cv180x_c906# "
+# CONFIG_SYS_XTRACE is not set
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_CONSOLE is not set
+# CONFIG_CMD_CPU is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_CMD_BOOTI is not set
+# CONFIG_BOOTM_NETBSD is not set
+CONFIG_BOOTM_OPENRTOS=y
+# CONFIG_BOOTM_PLAN9 is not set
+# CONFIG_BOOTM_RTEMS is not set
+# CONFIG_BOOTM_VXWORKS is not set
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_FDT is not set
+# CONFIG_CMD_GO is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_CRC32 is not set
+# CONFIG_CMD_MEMORY is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+# CONFIG_CMD_SAVEENV is not set 
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_ECHO=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SOURCE is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_BOOTP is not set
+# CONFIG_CMD_TFTPBOOT is not set
+# CONFIG_CMD_NFS is not set
+# CONFIG_CMD_BLOCK_CACHE is not set
+# CONFIG_CMD_SLEEP is not set
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+# CONFIG_ENV_IS_IN_SPI_FLASH is not set
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_CVITEK=y
+CONFIG_MTD=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set 
+CONFIG_PHY_CVITEK_CV182XA=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_FAT_WRITE=y
+# CONFIG_REGEX is not set
+CONFIG_LZMA=y
+# CONFIG_GZIP is not set
+# CONFIG_EFI_LOADER is not set
+# CONFIG_TOOLS_LIBCRYPTO is not set
+# CONFIG_ENV_SUPPORT is not set 
+# CONFIG_ENV_OVERWRITE is not set 
+CONFIG_ENV_IS_NOWHERE=y

build/boards/default/dts/cv180x/cv180x_asic_sd.dtsi

+/ {
+	/delete-node/ cv-emmc@4300000;
+	/delete-node/ cv-spinf@4060000;
+};

build/tools/common/image_tool/mkcvipart.py

@@ -131,6 +131,14 @@ def gen_cvipart_h(output, parser):
                     of.write('#define ROOTFS_DEV "/dev/mtdblock%d"\n' % i)
                     break
 
+        elif parser.getStorage() == "sd":
+            of.write('#define PART_LAYOUT ""\n')
+            for i, p in enumerate(parts):
+                if p["label"] == "ROOTFS":
+                    of.write('#define ROOTFS_DEV "/dev/mmcblk0p%d"\n' % (i+1))
+                    break
+            of.write('#define PARTS_OFFSET ""\n')
+
         elif parser.getStorage() == "none":
             of.write('#define PART_LAYOUT ""\n')
             of.write('#define ROOTFS_DEV ""\n')
@@ -155,7 +163,7 @@ def gen_cvipart_h(output, parser):
         if parser.getStorage() == "emmc":
             LBA_SIZE = 512
 
-        if parser.getStorage() != "none":
+        if parser.getStorage() != "none" and parser.getStorage() != "sd":
             of.write("#define PARTS_OFFSET \\\n")
             for i, p in enumerate(parts):
                 of.write('"%s_PART_OFFSET=0x%x\\0" \\\n' % (p["label"], int(p["offset"] / LBA_SIZE)))