Commit b342d865 authored by carbon's avatar carbon

kernel: enable spidev

parent 8eb42430
......@@ -8,6 +8,14 @@
snsr-reset = <&portc 8 GPIO_ACTIVE_LOW>, <&portc 8 GPIO_ACTIVE_LOW>, <&portc 8 GPIO_ACTIVE_LOW>;
};
&spi2 {
status = "okay";
spidev@0 {
status = "okay";
};
};
/ {
};
......
......@@ -124,6 +124,10 @@ CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y
CONFIG_SPI=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_DESIGNWARE=y
CONFIG_SPI_DW_MMIO=y
CONFIG_SPI_SPIDEV=y
# CONFIG_PTP_1588_CLOCK is not set
CONFIG_PINCTRL=y
CONFIG_CVITEK_PINCTRL_CV1835=y
......
......@@ -15,13 +15,12 @@ int cvi_board_init(void)
PINMUX_CONFIG(SPINOR_CS_X, XGPIOA_24);
PINMUX_CONFIG(IIC0_SDA, XGPIOA_29);
PINMUX_CONFIG(IIC0_SCL, XGPIOA_28);
// sd1
PINMUX_CONFIG(SD1_D3, PWR_GPIO_18);
PINMUX_CONFIG(SD1_D2, PWR_GPIO_19);
PINMUX_CONFIG(SD1_D1, PWR_GPIO_20);
PINMUX_CONFIG(SD1_D0, PWR_GPIO_21);
PINMUX_CONFIG(SD1_CMD, PWR_GPIO_22);
PINMUX_CONFIG(SD1_CLK, PWR_GPIO_23);
// SPI
PINMUX_CONFIG(SD1_CLK, SPI2_SCK);
PINMUX_CONFIG(SD1_CMD, SPI2_SDO);
PINMUX_CONFIG(SD1_D0, SPI2_SDI);
PINMUX_CONFIG(SD1_D3, SPI2_CS_X);
//default to gpio
PINMUX_CONFIG(PAD_MIPIRX1P, XGPIOC_9);
......
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