Skip to content

GitLab

T
TFT_eSPI
Commit d1b0bab9 authored by Bodmer's avatar Bodmer
Browse files
Options

Fix #581

parent 89bf0ce6
Show whitespace changes
Inline Side-by-side
Showing with 16 additions and 16 deletions
Processors/TFT_eSPI_STM32.h
View file @ d1b0bab9
...@@ -627,14 +627,14 @@ ...@@ -627,14 +627,14 @@
#define D6_PIN_NAME digitalPinToPinName(TFT_D6) #define D6_PIN_NAME digitalPinToPinName(TFT_D6)
#define D7_PIN_NAME digitalPinToPinName(TFT_D7) #define D7_PIN_NAME digitalPinToPinName(TFT_D7)
#define D0_PIN_BIT STM_LL_GPIO_PIN(D0_PIN_NAME) #define D0_PIN_BIT (D0_PIN_NAME & 0xF)
#define D1_PIN_BIT STM_LL_GPIO_PIN(D1_PIN_NAME) #define D1_PIN_BIT (D1_PIN_NAME & 0xF)
#define D2_PIN_BIT STM_LL_GPIO_PIN(D2_PIN_NAME) #define D2_PIN_BIT (D2_PIN_NAME & 0xF)
#define D3_PIN_BIT STM_LL_GPIO_PIN(D3_PIN_NAME) #define D3_PIN_BIT (D3_PIN_NAME & 0xF)
#define D4_PIN_BIT STM_LL_GPIO_PIN(D4_PIN_NAME) #define D4_PIN_BIT (D4_PIN_NAME & 0xF)
#define D5_PIN_BIT STM_LL_GPIO_PIN(D5_PIN_NAME) #define D5_PIN_BIT (D5_PIN_NAME & 0xF)
#define D6_PIN_BIT STM_LL_GPIO_PIN(D6_PIN_NAME) #define D6_PIN_BIT (D6_PIN_NAME & 0xF)
#define D7_PIN_BIT STM_LL_GPIO_PIN(D7_PIN_NAME) #define D7_PIN_BIT (D7_PIN_NAME & 0xF)
#define D0_PIN_PORT get_GPIO_Port(STM_PORT(D0_PIN_NAME)) #define D0_PIN_PORT get_GPIO_Port(STM_PORT(D0_PIN_NAME))
#define D1_PIN_PORT get_GPIO_Port(STM_PORT(D1_PIN_NAME)) #define D1_PIN_PORT get_GPIO_Port(STM_PORT(D1_PIN_NAME))
...@@ -645,14 +645,14 @@ ...@@ -645,14 +645,14 @@
#define D6_PIN_PORT get_GPIO_Port(STM_PORT(D6_PIN_NAME)) #define D6_PIN_PORT get_GPIO_Port(STM_PORT(D6_PIN_NAME))
#define D7_PIN_PORT get_GPIO_Port(STM_PORT(D7_PIN_NAME)) #define D7_PIN_PORT get_GPIO_Port(STM_PORT(D7_PIN_NAME))
#define D0_PIN_MASK (const uint16_t)(1UL<<D0_PIN_BIT) #define D0_PIN_MASK STM_LL_GPIO_PIN(D0_PIN_NAME)
#define D1_PIN_MASK (const uint16_t)(1UL<<D1_PIN_BIT) #define D1_PIN_MASK STM_LL_GPIO_PIN(D1_PIN_NAME)
#define D2_PIN_MASK (const uint16_t)(1UL<<D2_PIN_BIT) #define D2_PIN_MASK STM_LL_GPIO_PIN(D2_PIN_NAME)
#define D3_PIN_MASK (const uint16_t)(1UL<<D3_PIN_BIT) #define D3_PIN_MASK STM_LL_GPIO_PIN(D3_PIN_NAME)
#define D4_PIN_MASK (const uint16_t)(1UL<<D4_PIN_BIT) #define D4_PIN_MASK STM_LL_GPIO_PIN(D4_PIN_NAME)
#define D5_PIN_MASK (const uint16_t)(1UL<<D5_PIN_BIT) #define D5_PIN_MASK STM_LL_GPIO_PIN(D5_PIN_NAME)
#define D6_PIN_MASK (const uint16_t)(1UL<<D6_PIN_BIT) #define D6_PIN_MASK STM_LL_GPIO_PIN(D6_PIN_NAME)
#define D7_PIN_MASK (const uint16_t)(1UL<<D7_PIN_BIT) #define D7_PIN_MASK STM_LL_GPIO_PIN(D7_PIN_NAME)
// Create bit set/reset mask based on LS byte of value B // Create bit set/reset mask based on LS byte of value B
#define D0_BSR_MASK(B) ((D0_PIN_MASK<<16)>>(((B)<< 4)&0x10)) #define D0_BSR_MASK(B) ((D0_PIN_MASK<<16)>>(((B)<< 4)&0x10))
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment