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xpstem
TFT_eSPI
Commits
7b5f98a6
Commit
7b5f98a6
authored
Apr 29, 2022
by
Bodmer
Browse files
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Add RM68120 driver (UNTESTED!)
parent
6b1b2006
Changes
3
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3 changed files
with
505 additions
and
0 deletions
+505
-0
TFT_Drivers/RM68120_Defines.h
TFT_Drivers/RM68120_Defines.h
+47
-0
TFT_Drivers/RM68120_Init.h
TFT_Drivers/RM68120_Init.h
+429
-0
TFT_Drivers/RM68120_Rotation.h
TFT_Drivers/RM68120_Rotation.h
+29
-0
No files found.
TFT_Drivers/RM68120_Defines.h
0 → 100644
View file @
7b5f98a6
// Change the width and height if required (defined in portrait mode)
// or use the constructor to over-ride defaults
// RM68120_DRIVER
#define TFT_WIDTH 480
#define TFT_HEIGHT 800
//Set driver type common to all TBD initialisation options
#ifndef RM68120_DRIVER
#define RM68120_DRIVER
#endif
// Delay between some initialisation commands
#define TFT_INIT_DELAY 0x80 // Not used unless commandlist invoked
// Generic commands used by TFT_eSPI.cpp
#define TFT_NOP 0x0000
#define TFT_SWRST 0x0100
#define TFT_CASET 0x2A00
#define TFT_PASET 0x2B00
#define TFT_RAMWR 0x2C00
#define TFT_RAMRD 0x2E00
#define TFT_IDXRD 0xDD00 // ILI9341 only, indexed control register read
#define TFT_MADCTL 0x3600
#define TFT_MAD_MY 0x80
#define TFT_MAD_MX 0x40
#define TFT_MAD_MV 0x20
#define TFT_MAD_ML 0x10
#define TFT_MAD_BGR 0x08
#define TFT_MAD_MH 0x04
#define TFT_MAD_RGB 0x00
#ifdef TFT_RGB_ORDER
#if (TFT_RGB_ORDER == 1)
#define TFT_MAD_COLOR_ORDER TFT_MAD_RGB
#else
#define TFT_MAD_COLOR_ORDER TFT_MAD_BGR
#endif
#else
#define TFT_MAD_COLOR_ORDER TFT_MAD_RGB
#endif
#define TFT_INVOFF 0x2000
#define TFT_INVON 0x2100
TFT_Drivers/RM68120_Init.h
0 → 100644
View file @
7b5f98a6
writeRegister
(
0xF000
,
0x55
);
writeRegister
(
0xF001
,
0xAA
);
writeRegister
(
0xF002
,
0x52
);
writeRegister
(
0xF003
,
0x08
);
writeRegister
(
0xF004
,
0x01
);
//GAMMA SETING RED
writeRegister
(
0xD100
,
0x00
);
writeRegister
(
0xD101
,
0x00
);
writeRegister
(
0xD102
,
0x1b
);
writeRegister
(
0xD103
,
0x44
);
writeRegister
(
0xD104
,
0x62
);
writeRegister
(
0xD105
,
0x00
);
writeRegister
(
0xD106
,
0x7b
);
writeRegister
(
0xD107
,
0xa1
);
writeRegister
(
0xD108
,
0xc0
);
writeRegister
(
0xD109
,
0xee
);
writeRegister
(
0xD10A
,
0x55
);
writeRegister
(
0xD10B
,
0x10
);
writeRegister
(
0xD10C
,
0x2c
);
writeRegister
(
0xD10D
,
0x43
);
writeRegister
(
0xD10E
,
0x57
);
writeRegister
(
0xD10F
,
0x55
);
writeRegister
(
0xD110
,
0x68
);
writeRegister
(
0xD111
,
0x78
);
writeRegister
(
0xD112
,
0x87
);
writeRegister
(
0xD113
,
0x94
);
writeRegister
(
0xD114
,
0x55
);
writeRegister
(
0xD115
,
0xa0
);
writeRegister
(
0xD116
,
0xac
);
writeRegister
(
0xD117
,
0xb6
);
writeRegister
(
0xD118
,
0xc1
);
writeRegister
(
0xD119
,
0x55
);
writeRegister
(
0xD11A
,
0xcb
);
writeRegister
(
0xD11B
,
0xcd
);
writeRegister
(
0xD11C
,
0xd6
);
writeRegister
(
0xD11D
,
0xdf
);
writeRegister
(
0xD11E
,
0x95
);
writeRegister
(
0xD11F
,
0xe8
);
writeRegister
(
0xD120
,
0xf1
);
writeRegister
(
0xD121
,
0xfa
);
writeRegister
(
0xD122
,
0x02
);
writeRegister
(
0xD123
,
0xaa
);
writeRegister
(
0xD124
,
0x0b
);
writeRegister
(
0xD125
,
0x13
);
writeRegister
(
0xD126
,
0x1d
);
writeRegister
(
0xD127
,
0x26
);
writeRegister
(
0xD128
,
0xaa
);
writeRegister
(
0xD129
,
0x30
);
writeRegister
(
0xD12A
,
0x3c
);
writeRegister
(
0xD12B
,
0x4A
);
writeRegister
(
0xD12C
,
0x63
);
writeRegister
(
0xD12D
,
0xea
);
writeRegister
(
0xD12E
,
0x79
);
writeRegister
(
0xD12F
,
0xa6
);
writeRegister
(
0xD130
,
0xd0
);
writeRegister
(
0xD131
,
0x20
);
writeRegister
(
0xD132
,
0x0f
);
writeRegister
(
0xD133
,
0x8e
);
writeRegister
(
0xD134
,
0xff
);
//GAMMA SETING GREEN
writeRegister
(
0xD200
,
0x00
);
writeRegister
(
0xD201
,
0x00
);
writeRegister
(
0xD202
,
0x1b
);
writeRegister
(
0xD203
,
0x44
);
writeRegister
(
0xD204
,
0x62
);
writeRegister
(
0xD205
,
0x00
);
writeRegister
(
0xD206
,
0x7b
);
writeRegister
(
0xD207
,
0xa1
);
writeRegister
(
0xD208
,
0xc0
);
writeRegister
(
0xD209
,
0xee
);
writeRegister
(
0xD20A
,
0x55
);
writeRegister
(
0xD20B
,
0x10
);
writeRegister
(
0xD20C
,
0x2c
);
writeRegister
(
0xD20D
,
0x43
);
writeRegister
(
0xD20E
,
0x57
);
writeRegister
(
0xD20F
,
0x55
);
writeRegister
(
0xD210
,
0x68
);
writeRegister
(
0xD211
,
0x78
);
writeRegister
(
0xD212
,
0x87
);
writeRegister
(
0xD213
,
0x94
);
writeRegister
(
0xD214
,
0x55
);
writeRegister
(
0xD215
,
0xa0
);
writeRegister
(
0xD216
,
0xac
);
writeRegister
(
0xD217
,
0xb6
);
writeRegister
(
0xD218
,
0xc1
);
writeRegister
(
0xD219
,
0x55
);
writeRegister
(
0xD21A
,
0xcb
);
writeRegister
(
0xD21B
,
0xcd
);
writeRegister
(
0xD21C
,
0xd6
);
writeRegister
(
0xD21D
,
0xdf
);
writeRegister
(
0xD21E
,
0x95
);
writeRegister
(
0xD21F
,
0xe8
);
writeRegister
(
0xD220
,
0xf1
);
writeRegister
(
0xD221
,
0xfa
);
writeRegister
(
0xD222
,
0x02
);
writeRegister
(
0xD223
,
0xaa
);
writeRegister
(
0xD224
,
0x0b
);
writeRegister
(
0xD225
,
0x13
);
writeRegister
(
0xD226
,
0x1d
);
writeRegister
(
0xD227
,
0x26
);
writeRegister
(
0xD228
,
0xaa
);
writeRegister
(
0xD229
,
0x30
);
writeRegister
(
0xD22A
,
0x3c
);
writeRegister
(
0xD22B
,
0x4a
);
writeRegister
(
0xD22C
,
0x63
);
writeRegister
(
0xD22D
,
0xea
);
writeRegister
(
0xD22E
,
0x79
);
writeRegister
(
0xD22F
,
0xa6
);
writeRegister
(
0xD230
,
0xd0
);
writeRegister
(
0xD231
,
0x20
);
writeRegister
(
0xD232
,
0x0f
);
writeRegister
(
0xD233
,
0x8e
);
writeRegister
(
0xD234
,
0xff
);
//GAMMA SETING BLUE
writeRegister
(
0xD300
,
0x00
);
writeRegister
(
0xD301
,
0x00
);
writeRegister
(
0xD302
,
0x1b
);
writeRegister
(
0xD303
,
0x44
);
writeRegister
(
0xD304
,
0x62
);
writeRegister
(
0xD305
,
0x00
);
writeRegister
(
0xD306
,
0x7b
);
writeRegister
(
0xD307
,
0xa1
);
writeRegister
(
0xD308
,
0xc0
);
writeRegister
(
0xD309
,
0xee
);
writeRegister
(
0xD30A
,
0x55
);
writeRegister
(
0xD30B
,
0x10
);
writeRegister
(
0xD30C
,
0x2c
);
writeRegister
(
0xD30D
,
0x43
);
writeRegister
(
0xD30E
,
0x57
);
writeRegister
(
0xD30F
,
0x55
);
writeRegister
(
0xD310
,
0x68
);
writeRegister
(
0xD311
,
0x78
);
writeRegister
(
0xD312
,
0x87
);
writeRegister
(
0xD313
,
0x94
);
writeRegister
(
0xD314
,
0x55
);
writeRegister
(
0xD315
,
0xa0
);
writeRegister
(
0xD316
,
0xac
);
writeRegister
(
0xD317
,
0xb6
);
writeRegister
(
0xD318
,
0xc1
);
writeRegister
(
0xD319
,
0x55
);
writeRegister
(
0xD31A
,
0xcb
);
writeRegister
(
0xD31B
,
0xcd
);
writeRegister
(
0xD31C
,
0xd6
);
writeRegister
(
0xD31D
,
0xdf
);
writeRegister
(
0xD31E
,
0x95
);
writeRegister
(
0xD31F
,
0xe8
);
writeRegister
(
0xD320
,
0xf1
);
writeRegister
(
0xD321
,
0xfa
);
writeRegister
(
0xD322
,
0x02
);
writeRegister
(
0xD323
,
0xaa
);
writeRegister
(
0xD324
,
0x0b
);
writeRegister
(
0xD325
,
0x13
);
writeRegister
(
0xD326
,
0x1d
);
writeRegister
(
0xD327
,
0x26
);
writeRegister
(
0xD328
,
0xaa
);
writeRegister
(
0xD329
,
0x30
);
writeRegister
(
0xD32A
,
0x3c
);
writeRegister
(
0xD32B
,
0x4A
);
writeRegister
(
0xD32C
,
0x63
);
writeRegister
(
0xD32D
,
0xea
);
writeRegister
(
0xD32E
,
0x79
);
writeRegister
(
0xD32F
,
0xa6
);
writeRegister
(
0xD330
,
0xd0
);
writeRegister
(
0xD331
,
0x20
);
writeRegister
(
0xD332
,
0x0f
);
writeRegister
(
0xD333
,
0x8e
);
writeRegister
(
0xD334
,
0xff
);
//GAMMA SETING RED
writeRegister
(
0xD400
,
0x00
);
writeRegister
(
0xD401
,
0x00
);
writeRegister
(
0xD402
,
0x1b
);
writeRegister
(
0xD403
,
0x44
);
writeRegister
(
0xD404
,
0x62
);
writeRegister
(
0xD405
,
0x00
);
writeRegister
(
0xD406
,
0x7b
);
writeRegister
(
0xD407
,
0xa1
);
writeRegister
(
0xD408
,
0xc0
);
writeRegister
(
0xD409
,
0xee
);
writeRegister
(
0xD40A
,
0x55
);
writeRegister
(
0xD40B
,
0x10
);
writeRegister
(
0xD40C
,
0x2c
);
writeRegister
(
0xD40D
,
0x43
);
writeRegister
(
0xD40E
,
0x57
);
writeRegister
(
0xD40F
,
0x55
);
writeRegister
(
0xD410
,
0x68
);
writeRegister
(
0xD411
,
0x78
);
writeRegister
(
0xD412
,
0x87
);
writeRegister
(
0xD413
,
0x94
);
writeRegister
(
0xD414
,
0x55
);
writeRegister
(
0xD415
,
0xa0
);
writeRegister
(
0xD416
,
0xac
);
writeRegister
(
0xD417
,
0xb6
);
writeRegister
(
0xD418
,
0xc1
);
writeRegister
(
0xD419
,
0x55
);
writeRegister
(
0xD41A
,
0xcb
);
writeRegister
(
0xD41B
,
0xcd
);
writeRegister
(
0xD41C
,
0xd6
);
writeRegister
(
0xD41D
,
0xdf
);
writeRegister
(
0xD41E
,
0x95
);
writeRegister
(
0xD41F
,
0xe8
);
writeRegister
(
0xD420
,
0xf1
);
writeRegister
(
0xD421
,
0xfa
);
writeRegister
(
0xD422
,
0x02
);
writeRegister
(
0xD423
,
0xaa
);
writeRegister
(
0xD424
,
0x0b
);
writeRegister
(
0xD425
,
0x13
);
writeRegister
(
0xD426
,
0x1d
);
writeRegister
(
0xD427
,
0x26
);
writeRegister
(
0xD428
,
0xaa
);
writeRegister
(
0xD429
,
0x30
);
writeRegister
(
0xD42A
,
0x3c
);
writeRegister
(
0xD42B
,
0x4A
);
writeRegister
(
0xD42C
,
0x63
);
writeRegister
(
0xD42D
,
0xea
);
writeRegister
(
0xD42E
,
0x79
);
writeRegister
(
0xD42F
,
0xa6
);
writeRegister
(
0xD430
,
0xd0
);
writeRegister
(
0xD431
,
0x20
);
writeRegister
(
0xD432
,
0x0f
);
writeRegister
(
0xD433
,
0x8e
);
writeRegister
(
0xD434
,
0xff
);
//GAMMA SETING GREEN
writeRegister
(
0xD500
,
0x00
);
writeRegister
(
0xD501
,
0x00
);
writeRegister
(
0xD502
,
0x1b
);
writeRegister
(
0xD503
,
0x44
);
writeRegister
(
0xD504
,
0x62
);
writeRegister
(
0xD505
,
0x00
);
writeRegister
(
0xD506
,
0x7b
);
writeRegister
(
0xD507
,
0xa1
);
writeRegister
(
0xD508
,
0xc0
);
writeRegister
(
0xD509
,
0xee
);
writeRegister
(
0xD50A
,
0x55
);
writeRegister
(
0xD50B
,
0x10
);
writeRegister
(
0xD50C
,
0x2c
);
writeRegister
(
0xD50D
,
0x43
);
writeRegister
(
0xD50E
,
0x57
);
writeRegister
(
0xD50F
,
0x55
);
writeRegister
(
0xD510
,
0x68
);
writeRegister
(
0xD511
,
0x78
);
writeRegister
(
0xD512
,
0x87
);
writeRegister
(
0xD513
,
0x94
);
writeRegister
(
0xD514
,
0x55
);
writeRegister
(
0xD515
,
0xa0
);
writeRegister
(
0xD516
,
0xac
);
writeRegister
(
0xD517
,
0xb6
);
writeRegister
(
0xD518
,
0xc1
);
writeRegister
(
0xD519
,
0x55
);
writeRegister
(
0xD51A
,
0xcb
);
writeRegister
(
0xD51B
,
0xcd
);
writeRegister
(
0xD51C
,
0xd6
);
writeRegister
(
0xD51D
,
0xdf
);
writeRegister
(
0xD51E
,
0x95
);
writeRegister
(
0xD51F
,
0xe8
);
writeRegister
(
0xD520
,
0xf1
);
writeRegister
(
0xD521
,
0xfa
);
writeRegister
(
0xD522
,
0x02
);
writeRegister
(
0xD523
,
0xaa
);
writeRegister
(
0xD524
,
0x0b
);
writeRegister
(
0xD525
,
0x13
);
writeRegister
(
0xD526
,
0x1d
);
writeRegister
(
0xD527
,
0x26
);
writeRegister
(
0xD528
,
0xaa
);
writeRegister
(
0xD529
,
0x30
);
writeRegister
(
0xD52A
,
0x3c
);
writeRegister
(
0xD52B
,
0x4a
);
writeRegister
(
0xD52C
,
0x63
);
writeRegister
(
0xD52D
,
0xea
);
writeRegister
(
0xD52E
,
0x79
);
writeRegister
(
0xD52F
,
0xa6
);
writeRegister
(
0xD530
,
0xd0
);
writeRegister
(
0xD531
,
0x20
);
writeRegister
(
0xD532
,
0x0f
);
writeRegister
(
0xD533
,
0x8e
);
writeRegister
(
0xD534
,
0xff
);
//GAMMA SETING BLUE
writeRegister
(
0xD600
,
0x00
);
writeRegister
(
0xD601
,
0x00
);
writeRegister
(
0xD602
,
0x1b
);
writeRegister
(
0xD603
,
0x44
);
writeRegister
(
0xD604
,
0x62
);
writeRegister
(
0xD605
,
0x00
);
writeRegister
(
0xD606
,
0x7b
);
writeRegister
(
0xD607
,
0xa1
);
writeRegister
(
0xD608
,
0xc0
);
writeRegister
(
0xD609
,
0xee
);
writeRegister
(
0xD60A
,
0x55
);
writeRegister
(
0xD60B
,
0x10
);
writeRegister
(
0xD60C
,
0x2c
);
writeRegister
(
0xD60D
,
0x43
);
writeRegister
(
0xD60E
,
0x57
);
writeRegister
(
0xD60F
,
0x55
);
writeRegister
(
0xD610
,
0x68
);
writeRegister
(
0xD611
,
0x78
);
writeRegister
(
0xD612
,
0x87
);
writeRegister
(
0xD613
,
0x94
);
writeRegister
(
0xD614
,
0x55
);
writeRegister
(
0xD615
,
0xa0
);
writeRegister
(
0xD616
,
0xac
);
writeRegister
(
0xD617
,
0xb6
);
writeRegister
(
0xD618
,
0xc1
);
writeRegister
(
0xD619
,
0x55
);
writeRegister
(
0xD61A
,
0xcb
);
writeRegister
(
0xD61B
,
0xcd
);
writeRegister
(
0xD61C
,
0xd6
);
writeRegister
(
0xD61D
,
0xdf
);
writeRegister
(
0xD61E
,
0x95
);
writeRegister
(
0xD61F
,
0xe8
);
writeRegister
(
0xD620
,
0xf1
);
writeRegister
(
0xD621
,
0xfa
);
writeRegister
(
0xD622
,
0x02
);
writeRegister
(
0xD623
,
0xaa
);
writeRegister
(
0xD624
,
0x0b
);
writeRegister
(
0xD625
,
0x13
);
writeRegister
(
0xD626
,
0x1d
);
writeRegister
(
0xD627
,
0x26
);
writeRegister
(
0xD628
,
0xaa
);
writeRegister
(
0xD629
,
0x30
);
writeRegister
(
0xD62A
,
0x3c
);
writeRegister
(
0xD62B
,
0x4A
);
writeRegister
(
0xD62C
,
0x63
);
writeRegister
(
0xD62D
,
0xea
);
writeRegister
(
0xD62E
,
0x79
);
writeRegister
(
0xD62F
,
0xa6
);
writeRegister
(
0xD630
,
0xd0
);
writeRegister
(
0xD631
,
0x20
);
writeRegister
(
0xD632
,
0x0f
);
writeRegister
(
0xD633
,
0x8e
);
writeRegister
(
0xD634
,
0xff
);
//AVDD VOLTAGE SETTING
writeRegister
(
0xB000
,
0x05
);
writeRegister
(
0xB001
,
0x05
);
writeRegister
(
0xB002
,
0x05
);
//AVEE VOLTAGE SETTING
writeRegister
(
0xB100
,
0x05
);
writeRegister
(
0xB101
,
0x05
);
writeRegister
(
0xB102
,
0x05
);
//AVDD Boosting
writeRegister
(
0xB600
,
0x34
);
writeRegister
(
0xB601
,
0x34
);
writeRegister
(
0xB603
,
0x34
);
//AVEE Boosting
writeRegister
(
0xB700
,
0x24
);
writeRegister
(
0xB701
,
0x24
);
writeRegister
(
0xB702
,
0x24
);
//VCL Boosting
writeRegister
(
0xB800
,
0x24
);
writeRegister
(
0xB801
,
0x24
);
writeRegister
(
0xB802
,
0x24
);
//VGLX VOLTAGE SETTING
writeRegister
(
0xBA00
,
0x14
);
writeRegister
(
0xBA01
,
0x14
);
writeRegister
(
0xBA02
,
0x14
);
//VCL Boosting
writeRegister
(
0xB900
,
0x24
);
writeRegister
(
0xB901
,
0x24
);
writeRegister
(
0xB902
,
0x24
);
//Gamma Voltage
writeRegister
(
0xBc00
,
0x00
);
writeRegister
(
0xBc01
,
0xa0
);
//vgmp=5.0
writeRegister
(
0xBc02
,
0x00
);
writeRegister
(
0xBd00
,
0x00
);
writeRegister
(
0xBd01
,
0xa0
);
//vgmn=5.0
writeRegister
(
0xBd02
,
0x00
);
//VCOM Setting
writeRegister
(
0xBe01
,
0x3d
);
//3
//ENABLE PAGE 0
writeRegister
(
0xF000
,
0x55
);
writeRegister
(
0xF001
,
0xAA
);
writeRegister
(
0xF002
,
0x52
);
writeRegister
(
0xF003
,
0x08
);
writeRegister
(
0xF004
,
0x00
);
//Vivid Color Function Control
writeRegister
(
0xB400
,
0x10
);
//Z-INVERSION
writeRegister
(
0xBC00
,
0x05
);
writeRegister
(
0xBC01
,
0x05
);
writeRegister
(
0xBC02
,
0x05
);
//*************** add on 20111021**********************//
writeRegister
(
0xB700
,
0x22
);
//GATE EQ CONTROL
writeRegister
(
0xB701
,
0x22
);
//GATE EQ CONTROL
writeRegister
(
0xC80B
,
0x2A
);
//DISPLAY TIMING CONTROL
writeRegister
(
0xC80C
,
0x2A
);
//DISPLAY TIMING CONTROL
writeRegister
(
0xC80F
,
0x2A
);
//DISPLAY TIMING CONTROL
writeRegister
(
0xC810
,
0x2A
);
//DISPLAY TIMING CONTROL
//*************** add on 20111021**********************//
//PWM_ENH_OE =1
writeRegister
(
0xd000
,
0x01
);
//DM_SEL =1
writeRegister
(
0xb300
,
0x10
);
//VBPDA=07h
writeRegister
(
0xBd02
,
0x07
);
//VBPDb=07h
writeRegister
(
0xBe02
,
0x07
);
//VBPDc=07h
writeRegister
(
0xBf02
,
0x07
);
//ENABLE PAGE 2
writeRegister
(
0xF000
,
0x55
);
writeRegister
(
0xF001
,
0xAA
);
writeRegister
(
0xF002
,
0x52
);
writeRegister
(
0xF003
,
0x08
);
writeRegister
(
0xF004
,
0x02
);
//SDREG0 =0
writeRegister
(
0xc301
,
0xa9
);
//DS=14
writeRegister
(
0xfe01
,
0x94
);
//OSC =60h
writeRegister
(
0xf600
,
0x60
);
//TE ON
writeRegister
(
0x3500
,
0x00
);
//SLEEP OUT
writecommand
(
0x1100
);
delay
(
100
);
//DISPLY ON
writecommand
(
0x2900
);
delay
(
100
);
writeRegister
(
0x3A00
,
0x55
);
writeRegister
(
0x3600
,
0xA3
);
TFT_Drivers/RM68120_Rotation.h
0 → 100644
View file @
7b5f98a6
// This is the command sequence that rotates the RM68120 driver coordinate frame
rotation
=
m
%
4
;
// Limit the range of values to 0-3
writecommand
(
TFT_MADCTL
);
switch
(
rotation
)
{
case
0
:
writedata
(
TFT_MAD_COLOR_ORDER
);
_width
=
_init_width
;
_height
=
_init_height
;
break
;
case
1
:
writedata
(
TFT_MAD_MV
|
TFT_MAD_MX
|
TFT_MAD_COLOR_ORDER
);
_width
=
_init_height
;
_height
=
_init_width
;
break
;
case
2
:
writedata
(
TFT_MAD_MX
|
TFT_MAD_MY
|
TFT_MAD_COLOR_ORDER
);
_width
=
_init_width
;
_height
=
_init_height
;
break
;
case
3
:
writedata
(
TFT_MAD_MV
|
TFT_MAD_MY
|
TFT_MAD_COLOR_ORDER
);
_width
=
_init_height
;
_height
=
_init_width
;
break
;
}
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